Hi,
On Tue, Oct 21, 2008 at 02:33:49AM +0300, Urja Rannikko wrote:
> > Do you have an IT8770F datasheet? I haven't been able to find one.
> > I assume you know that it has the same ID as IT8661F because you
> > have a board with an IT8770F? Which one is that?
>
> A PCchips M741LMRT clone. It returned the same id,0x8661 (rev 0x6). but the
> marking on the superio chip says IT8770F. I could only find an 8661F
> datasheet. (i googled for IT8770F and found notes of it being identical to
> IT8661F and just gave it a try).
OK, sounds good.
> >> enter_conf_mode_ite (and if it succeeds, skip other enables).
> >> 0x3F0 is added to the ITE scanned ports because the 8661/8770 can be
> >> programmed to 0x3F0,0x370 or 0x3BD only
> >> (gets programmed by the test function).
> >
> > This is an interesting question -- is the config port hardcoded for each
> > board (and you have to use the correct one), or do you actually _choose_
> > the config port using the sequence below?
>
> yes, the probing sequence tries to program the I/O address given in port to
> the chip (3 different addresses valid), so its programmable. At the moment it
> would program it to first valid address probed (that returned the proper ID),
> though i was lazy and added only one to the list of probed addresses.
Yep, indeed. I tested on a board with IT8671F (which is similar, see
patch) and I can put it to whatever port I want, i.e. it's not hardcoded.
> >> + outb(0x55,isapnp_addr);
> >> + outb(0x55,isapnp_addr); /* Reset key check logic */
> >
> > Why 0x55 here? Couldn't find that piece of information in the
> > (IT8661F) datasheet, I think.
> >
>
> There only reads that 2 writes (propably of the same value, since 1st wrong
> value resets it and there's no 2 same sequentially in the isapnp key) to the
> address port would reset the key check logic. I chose 0x55 in random (and it
> seemed to be an invalid value for being a part of the key).
I dropped this part for now, the datasheets are very unclear what should
be done here. In some other ITE document which explains how to init the
Super I/Os I didn't see any such two writes either, and I also tested on
my hardware that the detection works fine without them.
> >> Index: superiotool.h
> >> ===================================================================
> >> --- superiotool.h (revision 3667)
> >> +++ superiotool.h (working copy)
> >> @@ -118,7 +118,7 @@
> >> } superio_ports_table[] = {
> >> {probe_idregs_ali, {0x3f0, 0x370, EOT}},
> >> {probe_idregs_fintek, {0x2e, 0x4e, EOT}},
> >> - {probe_idregs_ite, {0x2e, 0x4e, EOT}},
> >> + {probe_idregs_ite, {0x2e, 0x4e, 0x3f0, EOT}},
> >
> > Shouldn't 0x370 and 0x3bd also be added here then?
> >
>
> Maybe they could/should; i'm not sure, maybe to make sure that the SuperI/O
> is detected even if something occupies 0x3F0, but as said, its programmable
> to any of the 3 addresses...
Yeah, let's just use 0x370 for now (0x3f0 could be floppy).
Please check if my reworked patch below also works for you. I have
documented a few more quirks of these chips, as well as restructured
the code and added support for similar chips such as the IT8673F, and
IT8671F/IT8687R while I was at it.
It's tested on my IT8671F board, please post a 'superiotool -dV' of your
board if this patch works for you. If so, please send a mail with
'Acked-by: Urja Rannikko <[EMAIL PROTECTED]>' and I will commit.
Uwe.
--
http://www.hermann-uwe.de | http://www.holsham-traders.de
http://www.crazy-hacks.org | http://www.unmaintained-free-software.org
Add support for the ITE IT8661F/IT8770F, IT8673F, and IT8671F/IT8687R.
They all use a different init sequence than the more modern ITE Super I/Os.
For now we only use 0x370 as config port, but 0x3f0 or 0x3bd would also be
valid. Contrary to other Super I/Os, the config port for these is _not_
hardcoded via hardware, instead it can be programmed by software, i.e.
you get to choose whether you want to use 0x370, 0x3f0, or 0x3bd.
Tested on IT8671F.
Signed-off-by: Urja Rannikko <[EMAIL PROTECTED]>
Signed-off-by: Uwe Hermann <[EMAIL PROTECTED]>
Index: ite.c
===================================================================
--- ite.c (revision 3690)
+++ ite.c (working copy)
@@ -23,12 +23,11 @@
#define CHIP_ID_BYTE1_REG 0x20
#define CHIP_ID_BYTE2_REG 0x21
-
#define CHIP_VERSION_REG 0x22
+#define ISA_PNP_ADDR 0x279
static const struct superio_registers reg_table[] = {
- {0x8661, "IT8661F", {
- /* TODO: Needs different init sequence. */
+ {0x8661, "IT8661F/IT8770F", {
{NOLDN, NULL,
{0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x20,0x21,0x22,
0x23,0x24,EOT},
@@ -61,6 +60,10 @@
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,EOT}},
{EOT}}},
+ {0x8673, "IT8673F", {
+ {EOT}}},
+ {0x8681, "IT8671F/IT8687R", {
+ {EOT}}},
{0x8702, "IT8702F", {
{EOT}}},
{0x8705, "IT8705F/AF / IT8700F", {
@@ -436,22 +439,53 @@
{EOT}
};
+/* Works for: IT8661F/IT8770F */
+static const uint8_t initkey_it8661f[][4] = {
+ {0x86, 0x61, 0x55, 0x55}, /* 0x3f0 */
+ {0x86, 0x61, 0x55, 0xaa}, /* 0x3bd */
+ {0x86, 0x61, 0xaa, 0x55}, /* 0x370 */
+};
+
+/* Works for: IT8671F/IT8687R, IT8673F */
+static const uint8_t initkey_it8671f[][4] = {
+ {0x86, 0x80, 0x55, 0x55}, /* 0x3f0 */
+ {0x86, 0x80, 0x55, 0xaa}, /* 0x3bd */
+ {0x86, 0x80, 0xaa, 0x55}, /* 0x370 */
+};
+
+/* Works for: IT8661F/IT8770F, IT8671F/IT8687R, IT8673F. */
+static const uint8_t initkey_mbpnp[] = {
+ 0x6a, 0xb5, 0xda, 0xed, 0xf6, 0xfb, 0x7d, 0xbe, 0xdf, 0x6f, 0x37,
+ 0x1b, 0x0d, 0x86, 0xc3, 0x61, 0xb0, 0x58, 0x2c, 0x16, 0x8b, 0x45,
+ 0xa2, 0xd1, 0xe8, 0x74, 0x3a, 0x9d, 0xce, 0xe7, 0x73, 0x39,
+};
+
+/* Works for: IT8661F/IT8770F, IT8671F/IT8687R, IT8673F. */
+static void enter_conf_mode_ite_legacy(uint16_t port, const uint8_t init[][4])
+{
+ int i, idx;
+
+ /* Determine Super I/O config port. */
+ idx = (port == 0x3f0) ? 0 : ((port == 0x3bd) ? 1 : 2);
+ for (i = 0; i < 4; i++)
+ outb(init[idx][i], ISA_PNP_ADDR);
+
+ /* Sequentially write the 32 MB PnP init values. */
+ for (i = 0; i < 32; i++)
+ outb(initkey_mbpnp[i], port);
+}
+
/**
* IT871[01]F and IT8708F use 0x87, 0x87
* IT8761F uses 0x87, 0x61, 0x55, 0x55/0xaa
* IT86xxF series uses different ports
- * IT8661F uses 0x86, 0x61, 0x55/0xaa, 0x55/0xaa and 32 more writes
- * IT8673F uses 0x86, 0x80, 0x55/0xaa, 0x55/0xaa and 32 more writes
*/
static void enter_conf_mode_ite(uint16_t port)
{
outb(0x87, port);
outb(0x01, port);
outb(0x55, port);
- if (port == 0x2e)
- outb(0x55, port);
- else
- outb(0xaa, port);
+ outb((port == 0x2e) ? 0x55 : 0xaa, port);
}
static void exit_conf_mode_ite(uint16_t port)
@@ -498,13 +532,23 @@
void probe_idregs_ite(uint16_t port)
{
- enter_conf_mode_ite(port);
- probe_idregs_ite_helper("(init=0x87,0x01,0x55,0x55/0xaa) ", port);
- exit_conf_mode_ite(port);
+ if (port == 0x3f0 || port == 0x3bd || port == 0x370) {
+ enter_conf_mode_ite_legacy(port, initkey_it8661f);
+ probe_idregs_ite_helper("(init=legacy/it8661f) ", port);
+ exit_conf_mode_ite(port);
- enter_conf_mode_winbond_fintek_ite_8787(port);
- probe_idregs_ite_helper("(init=0x87,0x87) ", port);
- exit_conf_mode_winbond_fintek_ite_8787(port);
+ enter_conf_mode_ite_legacy(port, initkey_it8671f);
+ probe_idregs_ite_helper("(init=legacy/it8671f) ", port);
+ exit_conf_mode_ite(port);
+ } else {
+ enter_conf_mode_ite(port);
+ probe_idregs_ite_helper("(init=0x87,0x01,0x55,0x55/0xaa) ", port);
+ exit_conf_mode_ite(port);
+
+ enter_conf_mode_winbond_fintek_ite_8787(port);
+ probe_idregs_ite_helper("(init=0x87,0x87) ", port);
+ exit_conf_mode_winbond_fintek_ite_8787(port);
+ }
}
void print_ite_chips(void)
Index: superiotool.c
===================================================================
--- superiotool.c (revision 3690)
+++ superiotool.c (working copy)
@@ -32,7 +32,7 @@
uint8_t regval(uint16_t port, uint8_t reg)
{
outb(reg, port);
- return inb(port + 1);
+ return inb(port + ((port == 0x3bd) ? 2 : 1)); /* 0x3bd is special. */
}
void regwrite(uint16_t port, uint8_t reg, uint8_t val)
Index: superiotool.h
===================================================================
--- superiotool.h (revision 3690)
+++ superiotool.h (working copy)
@@ -118,7 +118,8 @@
} superio_ports_table[] = {
{probe_idregs_ali, {0x3f0, 0x370, EOT}},
{probe_idregs_fintek, {0x2e, 0x4e, EOT}},
- {probe_idregs_ite, {0x2e, 0x4e, EOT}},
+ /* Only use 0x370 for ITE, but 0x3f0 or 0x3bd would also be valid. */
+ {probe_idregs_ite, {0x2e, 0x4e, 0x370, EOT}},
{probe_idregs_nsc, {0x2e, 0x4e, 0x15c, EOT}},
{probe_idregs_smsc, {0x2e, 0x4e, 0x162e, 0x164e, 0x3f0, 0x370, EOT}},
{probe_idregs_winbond, {0x2e, 0x4e, 0x3f0, 0x370, 0x250, EOT}},
Index: README
===================================================================
--- README (revision 3690)
+++ README (working copy)
@@ -95,5 +95,6 @@
Ronald Minnich <[EMAIL PROTECTED]>
Stefan Reinauer <[EMAIL PROTECTED]>
Ulf Jordan <[EMAIL PROTECTED]>
+Urja Rannikko <[EMAIL PROTECTED]>
Uwe Hermann <[EMAIL PROTECTED]>
Ward Vandewege <[EMAIL PROTECTED]>
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