On Fri, Oct 24, 2008 at 6:10 AM, ron minnich <[EMAIL PROTECTED]> wrote:
> > +--18.0----(Link n where n in [0,1,2])--+--19.0--(CPU)-(2nd HT link) > > | |\ | > \--(3rd HT link) > > | | | +--19.1 > > | | | +--19.2 > > | | | +--19.3 > > | | | > > | | \--18.0(second HT link)---(may be empty) > > | | > > | \----18.0(third HT link)--+--0.0 > > | +--1.0 > > | \--1.1 > > +--18.1 > > +--18.2 > > +--18.3 > you should only specify sb chain that lpc bus to rom. others should be probed automatically. v2 already did that. and only need to specify first node. YH
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