On Mon, Oct 27, 2008 at 12:25 PM, Carl-Daniel Hailfinger <[EMAIL PROTECTED]> wrote: > On 27.10.2008 20:10, ron minnich wrote: >> Marc reviewed the v3 device tree code and we developed the set of >> cleanups/fixes. >> >> Fixup device tree code. Add/change methods as needed. This should help >> serengeti. >> >> Signed-off-by: Ronald G. Minnich<[EMAIL PROTECTED]> >> > > If you can get Marc to ack this, it is also > Acked-by: Carl-Daniel Hailfinger <[EMAIL PROTECTED]> > > I'd appreciate related fixups in the v3 design doc (or do we have to > rewrite that one anyway)? > > One comment below, though it does not refer directly to your patch. > > Regards, > Carl-Daniel > >> Index: device/pci_rom.c >> =================================================================== >> --- device/pci_rom.c (revision 953) >> +++ device/pci_rom.c (working copy) >> @@ -108,7 +108,8 @@ >> rom_data = (struct pci_data *)((unsigned char *)rom_header + >> le32_to_cpu(rom_header->data)); > > Am I missing something here or is the line above missing somebounds check? >
good catch. Bug has been there forever. That is a 16-bit field but still ... Let's get a fix in for that one. ron -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
