Author: myles
Date: 2008-11-05 23:18:53 +0100 (Wed, 05 Nov 2008)
New Revision: 982
Modified:
coreboot-v3/arch/x86/pci_ops_auto.c
coreboot-v3/include/arch/x86/pci_ops.h
coreboot-v3/northbridge/amd/geodelx/geodelx.c
Log:
This patch removes code related to PCI type 2 configuration cycles (gone as of
PCI 2.2)
Signed-off-by: Myles Watson <[EMAIL PROTECTED]>
Acked-by: Ronald G. Minnich <[EMAIL PROTECTED]>
Modified: coreboot-v3/arch/x86/pci_ops_auto.c
===================================================================
--- coreboot-v3/arch/x86/pci_ops_auto.c 2008-11-05 21:50:25 UTC (rev 981)
+++ coreboot-v3/arch/x86/pci_ops_auto.c 2008-11-05 22:18:53 UTC (rev 982)
@@ -15,7 +15,7 @@
.write8 = pci_conf1_write_config8,
.write16 = pci_conf1_write_config16,
.write32 = pci_conf1_write_config32,
- .find = pci_conf1_find_device,
+ .find = pci_conf1_find_device,
};
@@ -53,36 +53,27 @@
return 0;
}
-const struct pci_bus_operations *pci_check_direct(void)
+void pci_check_pci_ops(const struct pci_bus_operations *ops)
{
unsigned int tmp;
/*
- * Check if configuration type 1 works.
+ * Check if configuration cycles work.
*/
+ if (ops == &pci_cf8_conf1)
{
outb(0x01, 0xCFB);
tmp = inl(0xCF8);
outl(0x80000000, 0xCF8);
if ((inl(0xCF8) == 0x80000000) &&
- pci_sanity_check(&pci_cf8_conf1))
+ pci_sanity_check(ops))
{
outl(tmp, 0xCF8);
printk(BIOS_DEBUG, "PCI: Using configuration type 1\n");
- return &pci_cf8_conf1;
+ return;
}
outl(tmp, 0xCF8);
}
- die("pci_check_direct failed\n");
- return NULL;
+ die("pci_check_pci_ops failed\n");
}
-
-/** Set the method to be used for PCI, type I or type II
- */
-void pci_set_method(struct device * dev)
-{
- printk(BIOS_INFO, "Finding PCI configuration type.\n");
- dev->ops->ops_pci_bus = pci_check_direct();
- post_code(POST_STAGE2_PHASE2_PCI_SET_METHOD);
-}
Modified: coreboot-v3/include/arch/x86/pci_ops.h
===================================================================
--- coreboot-v3/include/arch/x86/pci_ops.h 2008-11-05 21:50:25 UTC (rev
981)
+++ coreboot-v3/include/arch/x86/pci_ops.h 2008-11-05 22:18:53 UTC (rev
982)
@@ -25,6 +25,6 @@
extern const struct pci_bus_operations pci_ops_mmconf;
#endif
-void pci_set_method(struct device * dev);
+void pci_check_pci_ops(const struct pci_bus_operations * ops);
#endif /* ARCH_X86_PCI_OPS_H */
Modified: coreboot-v3/northbridge/amd/geodelx/geodelx.c
===================================================================
--- coreboot-v3/northbridge/amd/geodelx/geodelx.c 2008-11-05 21:50:25 UTC
(rev 981)
+++ coreboot-v3/northbridge/amd/geodelx/geodelx.c 2008-11-05 22:18:53 UTC
(rev 982)
@@ -196,7 +196,7 @@
/* print_conf(); */
printk(BIOS_DEBUG, "VRC_VG value: 0x%04x\n", nb_dm->geode_video_mb);
graphics_init((u8)nb_dm->geode_video_mb);
- pci_set_method(dev);
+ pci_check_pci_ops(dev->ops->ops_pci_bus);
}
/**
--
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