On Sat, Nov 8, 2008 at 6:40 PM, Marc Jones <[EMAIL PROTECTED]> wrote: >> On Fri, Nov 7, 2008 at 11:47 PM, Marc Jones wrote: >> > GPIO is BAR1 (offset 0x14) in the 5536. >> 00:0f.0 ISA bridge: Advanced Micro Devices [AMD] CS5536 [Geode >> companion] ISA (rev 03) >> Subsystem: Advanced Micro Devices [AMD] CS5536 [Geode companion] ISA >> Control: I/O+ Mem- BusMaster- SpecCycle+ MemWINV- VGASnoop- >> ParErr+ Stepping- SERR- FastB2B- DisINTx- >> Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >> >TAbort- SERR- >> Region 0: I/O ports at 24b0 [size=8] >> Region 1: I/O ports at 1c00 [size=256] >> Region 2: I/O ports at 2400 [size=64] >> Region 3: I/O ports at 2480 [size=32] >> Region 4: I/O ports at 2000 [size=128] >> Region 5: I/O ports at 2440 [size=64] > > Region 1: 1C00 is what you want to use. The driver should check that BAR and > use that address.
ok, I will try it but this is only one led, what about others? their ports will change respectively? 6100->1c00, 6180->1c80 ? and what about this? is it needed? outl(GPIOL_6_SET, GPIO_IO_BASE + GPIOL_OUT_AUX1_SELECT); outl(GPIOL_6_SET, GPIO_IO_BASE + GPIOL_OUTPUT_ENABLE); outl(GPIOL_6_SET, GPIO_IO_BASE + GPIOL_IN_AUX1_SELECT); outl(GPIOL_6_SET, GPIO_IO_BASE + GPIOL_INPUT_ENABLE); Roman -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
