Kevin O'Connor wrote:
> Did you setup SeaBIOS' idt/gdt? If not, you won't be able to use
> call16() which would break calling option roms from SeaBIOS. (It also
> prevents usleep() from working which would prevent certain devices
> from initializing.)
>
> Otherwise, can you post the entry code that you are using?
>
I worked on unifying the GDTs used in coreboot-v3, coreboot-v3 real-mode
and SeaBIOS, so I don't load a GDT in SeaBIOS, but I do load the SeaBIOS
IDT. See both attached patches.
Signed-off-by: Stefan Reinauer <[EMAIL PROTECTED]>
--
coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br.
Tel.: +49 761 7668825 • Fax: +49 761 7664613
Email: [EMAIL PROTECTED] • http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg • HRB 7656
Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866
diff -ur -x .git seabios-old/src/config.h seabios-new/src/config.h
--- seabios-old/src/config.h 2008-11-10 01:01:06.000000000 +0100
+++ seabios-new/src/config.h 2008-11-10 00:39:52.000000000 +0100
@@ -13,13 +13,13 @@
#define CONFIG_APPNAME4 "BXPC"
// Configure as a coreboot payload.
-#define CONFIG_COREBOOT 0
+#define CONFIG_COREBOOT 1
// Control how verbose debug output is.
-#define CONFIG_DEBUG_LEVEL 1
+#define CONFIG_DEBUG_LEVEL 3
// Send debugging information to serial port
-#define CONFIG_DEBUG_SERIAL 0
+#define CONFIG_DEBUG_SERIAL 1
// Support for int13 floppy drive access
#define CONFIG_FLOPPY_SUPPORT 1
@@ -101,10 +101,10 @@
#define SEG_BDA 0x0000
// Segment definitions in 32bit mode.
-#define SEG32_MODE32_CS (2 << 3) // 0x10
-#define SEG32_MODE32_DS (3 << 3) // 0x18
-#define SEG32_MODE16_CS (4 << 3) // 0x20
-#define SEG32_MODE16_DS (5 << 3) // 0x28
+#define SEG32_MODE32_CS (1 << 3) // 0x08
+#define SEG32_MODE32_DS (2 << 3) // 0x10
+#define SEG32_MODE16_CS (3 << 3) // 0x18
+#define SEG32_MODE16_DS (4 << 3) // 0x20
// Debugging levels. If non-zero and CONFIG_DEBUG_LEVEL is greater
// than the specified value, then the corresponding irq handler will
diff -ur -x .git seabios-old/src/post.c seabios-new/src/post.c
--- seabios-old/src/post.c 2008-11-10 01:01:06.000000000 +0100
+++ seabios-new/src/post.c 2008-11-10 00:39:11.000000000 +0100
@@ -293,9 +293,9 @@
call16(&br);
}
-// 32-bit entry point.
+
void VISIBLE32
-_start()
+_init()
{
init_dma();
check_restart_status();
@@ -311,6 +311,14 @@
// Perform main setup code.
post();
+}
+
+// 32-bit entry point.
+void VISIBLE32
+_start()
+{
+ // Call init
+ _init();
// Present the user with a bootup menu.
interactive_bootmenu();
@@ -333,3 +341,4 @@
// functions to not be exported as a global variable - force _start
// to be global here.
asm(".global _start");
+asm(".global _init");
diff -ur -x .git seabios-old/src/romlayout.S seabios-new/src/romlayout.S
--- seabios-old/src/romlayout.S 2008-11-10 01:01:06.000000000 +0100
+++ seabios-new/src/romlayout.S 2008-11-10 00:39:25.000000000 +0100
@@ -7,7 +7,6 @@
#include "config.h"
-
/****************************************************************
* Include of 16bit C code
****************************************************************/
@@ -539,6 +538,20 @@
ORG 0xff54
IRQ_ENTRY_ARG 05
+.code32
+ ORG 0xffe0 // coreboot Entry Point
+ cli
+ cld
+ lidtl (BUILD_BIOS_ADDR + pmode_IDT_info)
+ // lgdtl (BUILD_BIOS_ADDR + rombios32_gdt_48)
+ // movl $BUILD_STACK_ADDR, %esp
+ // ljmpl $PROTECTED_MODE_CS, $_code32__start
+
+
+ calll (_code32__init - BUILD_BIOS_ADDR)
+ ret
+.code16gcc
+
ORG 0xfff0 // Power-up Entry Point
ljmpw $SEG_BIOS, $post16
Index: include/arch/x86/amd_geodelx.h
===================================================================
--- include/arch/x86/amd_geodelx.h (revision 989)
+++ include/arch/x86/amd_geodelx.h (working copy)
@@ -602,9 +602,6 @@
#define ROM_CODE_SEG 0x08
#define ROM_DATA_SEG 0x10
-#define CACHE_RAM_CODE_SEG 0x18
-#define CACHE_RAM_DATA_SEG 0x20
-
/* POST CODES */
/* standard AMD post definitions -- might as well use them. */
Index: include/arch/x86/amd/k8/k8.h
===================================================================
--- include/arch/x86/amd/k8/k8.h (revision 989)
+++ include/arch/x86/amd/k8/k8.h (working copy)
@@ -30,9 +30,6 @@
#define ROM_CODE_SEG 0x08
#define ROM_DATA_SEG 0x10
-#define CACHE_RAM_CODE_SEG 0x18
-#define CACHE_RAM_DATA_SEG 0x20
-
#define IORR_FIRST 0xC0010016
#define IORR_LAST 0xC0010019
Index: util/lxregs/lxregs.c
===================================================================
--- util/lxregs/lxregs.c (revision 989)
+++ util/lxregs/lxregs.c (working copy)
@@ -1629,9 +1629,6 @@
#define ROM_CODE_SEG 0x08
#define ROM_DATA_SEG 0x10
-#define CACHE_RAM_CODE_SEG 0x18
-#define CACHE_RAM_DATA_SEG 0x20
-
/* POST CODES */
/* standard AMD post definitions -- might as well use them. */
@@ -2336,8 +2333,6 @@
{"BMO_DMM", BMO_DMM},
{"BMO_SMM", BMO_SMM},
{"BM_SMM", BM_SMM},
- {"CACHE_RAM_CODE_SEG", CACHE_RAM_CODE_SEG},
- {"CACHE_RAM_DATA_SEG", CACHE_RAM_DATA_SEG},
{"CAPABILITIES", CAPABILITIES},
{"CF07_LOWER_EMR_DRV_SET", CF07_LOWER_EMR_DRV_SET},
{"CF07_LOWER_EMR_QFC_SET", CF07_LOWER_EMR_QFC_SET},
Index: util/x86emu/vm86_gdt.c
===================================================================
--- util/x86emu/vm86_gdt.c (revision 989)
+++ util/x86emu/vm86_gdt.c (working copy)
@@ -29,51 +29,6 @@
*/
__asm__ (
- /* pointer to original gdt */
- " .globl gdtarg\n"
- "gdtarg: \n"
- " .word gdt_limit \n"
- " .long gdtptr \n"
-
- /* compute the table limit */
- "__mygdt_limit = __mygdt_end - __mygdt - 1 \n"
- " .globl __mygdtaddr\n"
- "__mygdtaddr: \n"
- " .word __mygdt_limit \n"
- " .long __mygdt \n"
-
- " .globl __mygdt\n"
- "__mygdt: \n"
- /* selgdt 0, unused */
- " .word 0x0000, 0x0000 \n"
- " .byte 0x00, 0x00, 0x00, 0x00 \n"
-
- /* selgdt 8, unused */
- " .word 0x0000, 0x0000 \n"
- " .byte 0x00, 0x00, 0x00, 0x00 \n"
-
- /* selgdt 0x10, flat code segment */
- " .word 0xffff, 0x0000 \n"
- " .byte 0x00, 0x9b, 0xcf, 0x00 \n"
-
- /* selgdt 0x18, flat data segment */
- " .word 0xffff, 0x0000 \n"
- " .byte 0x00, 0x93, 0xcf, 0x00 \n"
-
- /* selgdt 0x20, unused */
- " .word 0x0000, 0x0000 \n"
- " .byte 0x00, 0x00, 0x00, 0x00 \n"
-
- /* selgdt 0x28 16-bit 64k code at 0x00000000 */
- " .word 0xffff, 0x0000 \n"
- " .byte 0, 0x9a, 0, 0 \n"
-
- /* selgdt 0x30 16-bit 64k data at 0x00000000 */
- " .word 0xffff, 0x0000 \n"
- " .byte 0, 0x92, 0, 0 \n"
-
- "__mygdt_end: \n"
-
/* FIXME: This does probably not belong here */
" .globl idtarg\n"
"idtarg:\n"
Index: util/x86emu/x86.c
===================================================================
--- util/x86emu/x86.c (revision 0)
+++ util/x86emu/x86.c (revision 0)
@@ -0,0 +1,278 @@
+/*
+ * Erik Arjan Hendriks <[EMAIL PROTECTED]>
+ * Copyright (C) 2000 Scyld Computing Corporation
+ * Copyright (C) 2001 University of California. LA-CC Number 01-67.
+ * Copyright (C) 2005 [EMAIL PROTECTED]
+ * Copyright (C) 2007 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ */
+
+#include <console.h>
+#include <lar.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+#include <console.h>
+#include <string.h>
+#include <io.h>
+
+static void execute_vga_optionrom(unsigned long devfn)
+{
+ __asm__ __volatile__ (
+ " pushal \n"
+ /* save the stack */
+ " mov %esp, __stack \n"
+ " jmp 1f \n"
+ "__stack: .long 0 \n"
+ "1:\n"
+ /* get devfn into %ecx */
+ " movl %esp, %ebp \n"
+ // FIXME: why is this 8?
+ " movl 8(%ebp), %ecx \n"
+
+ /* This configures CS properly for real mode. */
+ " ljmp $0x28, $__rms_16bit\n"
+ "__rms_16bit: \n"
+ " .code16 \n"
+ /* 16 bit code from here on... */
+
+ /* Load the segment registers w/ properly configured
+ * segment descriptors. They will retain these
+ * configurations (limits, writability, etc.) once
+ * protected mode is turned off.
+ */
+ " mov $0x20, %ax \n"
+ " mov %ax, %ds \n"
+ " mov %ax, %es \n"
+ " mov %ax, %fs \n"
+ " mov %ax, %gs \n"
+ " mov %ax, %ss \n"
+
+ /* Turn off protection (bit 0 in CR0) */
+ " movl %cr0, %eax \n"
+ " andl $0xFFFFFFFE, %eax \n"
+ " movl %eax, %cr0 \n"
+
+ /* Now really going into real mode */
+ " ljmp $0, $__rms_real\n"
+ "__rms_real: \n"
+
+ /* Setup a stack: Put the stack at the end of page zero.
+ * That way we can easily share it between real and
+ * protected, since the 16-bit ESP at segment 0 will
+ * work for any case. */
+ " mov $0x0, %ax \n"
+ " mov %ax, %ss \n"
+ " movl $0x1000, %eax \n"
+ " movl %eax, %esp \n"
+
+ /* Load our 16 it idt */
+ " xor %ax, %ax \n"
+ " mov %ax, %ds \n"
+ " lidt __myidt \n"
+
+ /* Dump zeros in the other segment registers */
+ " mov %ax, %es \n"
+ " mov %ax, %fs \n"
+ " mov %ax, %gs \n"
+ " mov $0x40, %ax \n"
+ " mov %ax, %ds \n"
+ " mov %cx, %ax \n"
+
+ /* run VGA BIOS at 0xc000:0003 */
+ " lcall $0xc000, $0x0003\n"
+
+ /* If we got here, just about done.
+ * Need to get back to protected mode
+ */
+ " movl %cr0, %eax \n"
+ " orl $0x0000001, %eax\n" /* PE = 1 */
+ " movl %eax, %cr0 \n"
+
+ /* Now that we are in protected mode
+ * jump to a 32 bit code segment.
+ */
+ " data32 ljmp $0x10, $vgarestart\n"
+ "vgarestart:\n"
+ " .code32\n"
+ " movw $0x18, %ax \n"
+ " mov %ax, %ds \n"
+ " mov %ax, %es \n"
+ " mov %ax, %fs \n"
+ " mov %ax, %gs \n"
+ " mov %ax, %ss \n"
+
+ /* restore proper gdt and idt */
+ // " lgdt %cs:gdtarg \n"
+ " lidt idtarg \n"
+
+ ".globl vga_exit \n"
+ "vga_exit: \n"
+ " mov __stack, %esp \n"
+ " popal \n"
+ );
+}
+
+/* call vga bios int 10 function 0x4f14 to enable main console.
+ * epia-m does not always autosence the main console so forcing
+ * it on is good !
+ */
+void vga_enable_console(void)
+{
+ __asm__ __volatile__ (
+ /* paranoia -- does ecx get saved? not sure. This is
+ * the easiest safe thing to do. */
+ " pushal \n"
+ /* save the stack */
+ " mov %esp, __stack \n"
+
+ /* load 'our' gdt */
+ //" lgdt %cs:__mygdtaddr \n"
+
+ /* This configures CS properly for real mode. */
+ " ljmp $0x28, $__vga_ec_16bit\n"
+ "__vga_ec_16bit: \n"
+ " .code16 \n"
+ /* 16 bit code from here on... */
+
+ /* Load the segment registers w/ properly configured segment
+ * descriptors. They will retain these configurations (limits,
+ * writability, etc.) once protected mode is turned off. */
+ " mov $0x20, %ax \n"
+ " mov %ax, %ds \n"
+ " mov %ax, %es \n"
+ " mov %ax, %fs \n"
+ " mov %ax, %gs \n"
+ " mov %ax, %ss \n"
+
+ /* Turn off protection (bit 0 in CR0) */
+ " movl %cr0, %eax \n"
+ " andl $0xFFFFFFFE, %eax\n"
+ " movl %eax, %cr0 \n"
+
+ /* Now really going into real mode */
+ " ljmp $0, $__vga_ec_real \n"
+ "__vga_ec_real: \n"
+
+ /* put the stack at the end of page zero.
+ * that way we can easily share it between real and protected,
+ * since the 16-bit ESP at segment 0 will work for any case. */
+ /* Setup a stack */
+ " mov $0x0, %ax \n"
+ " mov %ax, %ss \n"
+ " movl $0x1000, %eax \n"
+ " movl %eax, %esp \n"
+
+ /* debugging for RGM */
+ " mov $0x11, %al \n"
+ " outb %al, $0x80 \n"
+
+ /* Load our 16 it idt */
+ " xor %ax, %ax \n"
+ " mov %ax, %ds \n"
+ " lidt __myidt \n"
+
+ /* Dump zeros in the other segregs */
+ " mov %ax, %ds \n"
+ " mov %ax, %es \n"
+ " mov %ax, %fs \n"
+ " mov %ax, %gs \n"
+
+ /* ask bios to enable main console */
+ /* set up for int 10 call - values found from X server
+ * bios call routines */
+ " movw $0x4f14,%ax \n"
+ " movw $0x8003,%bx \n"
+ " movw $1, %cx \n"
+ " movw $0, %dx \n"
+ " movw $0, %di \n"
+ " int $0x10 \n"
+
+ " movb $0x55, %al \n"
+ " outb %al, $0x80 \n"
+
+ /* if we got here, just about done.
+ * Need to get back to protected mode */
+ " movl %cr0, %eax \n"
+ " orl $0x0000001, %eax\n" /* PE = 1 */
+ " movl %eax, %cr0 \n"
+
+ /* Now that we are in protected mode jump to a 32 bit code segment. */
+ " data32 ljmp $0x10, foo\n"
+ "foo:\n"
+ " .code32\n"
+ " movw $0x18, %ax \n"
+ " mov %ax, %ds \n"
+ " mov %ax, %es \n"
+ " mov %ax, %fs \n"
+ " mov %ax, %gs \n"
+ " mov %ax, %ss \n"
+
+ /* restore proper idt */
+ " lidt idtarg \n"
+ "vga_ec_exit:\n"
+ " mov __stack, %esp \n"
+ " popal\n"
+ );
+}
+
+static int systembios_copied = 0;
+
+int copy_systembios(void)
+{
+ struct mem_file archive, result;
+ int ret;
+
+ init_archive(&archive);
+
+ ret = find_file(&archive, "bios.bin", &result);
+ if (ret) {
+ printk(BIOS_WARNING, "No legacy bios found.\n");
+ return -1;
+ }
+
+ process_file(&result, (void *)0xf0000);
+
+ printk(BIOS_WARNING, "FSEG: 0x%04x\n", *(u16*)0xf2617);
+
+ systembios_copied = -1;
+
+ return 0;
+}
+
+
+void run_bios(struct device *dev, unsigned long addr)
+{
+ int i;
+ void (*init_systembios)(void) = (void *)0xfffe0;
+
+ /* clear vga bios data area */
+ // XXX fixme this should be set up right instead.
+ for (i = 0x400; i < 0x500; i++) {
+ *(unsigned char *) i = 0;
+ }
+
+ copy_systembios();
+
+ printk(BIOS_WARNING, "Copied system BIOS, now jumping into it.\n");
+
+ init_systembios();
+
+ printk(BIOS_WARNING, "Returned from system BIOS, now calling option rom\n");
+ execute_vga_optionrom((dev->bus->secondary << 8) | dev->path.pci.devfn);
+}
+
Index: util/x86emu/Makefile
===================================================================
--- util/x86emu/Makefile (revision 989)
+++ util/x86emu/Makefile (working copy)
@@ -19,8 +19,8 @@
##
X86EMU_SRC = debug.c decode.c fpu.c ops.c ops2.c prim_ops.c sys.c
-BIOSEMU_SRC = biosemu.c pcbios/pcibios.c
-VM86_SRC = vm86.c vm86_gdt.c
+BIOSEMU_SRC = biosemu.c
+VM86_SRC = x86.c vm86_gdt.c
ifeq ($(CONFIG_PCI_OPTION_ROM_RUN_X86EMU),y)
LIBX86EMU_SRC=$(patsubst %,x86emu/%,$(X86EMU_SRC)) $(BIOSEMU_SRC)
Index: arch/x86/via/stage0.S
===================================================================
--- arch/x86/via/stage0.S (revision 989)
+++ arch/x86/via/stage0.S (working copy)
@@ -5,7 +5,7 @@
* Copyright (C) 2005 Eswar Nallusamy, LANL
* Copyright (C) 2005 Tyan
* (Written by Yinghai Lu <[EMAIL PROTECTED]> for Tyan)
- * Copyright (C) 2007 coresystems GmbH
+ * Copyright (C) 2007-2008 coresystems GmbH
* (Written by Stefan Reinauer <[EMAIL PROTECTED]> for coresystems GmbH)
* Copyright (C) 2007,2008 Carl-Daniel Hailfinger
* Copyright (C) 2008 VIA Technologies, Inc.
@@ -32,9 +32,6 @@
#define ROM_CODE_SEG 0x08
#define ROM_DATA_SEG 0x10
-#define CACHE_RAM_CODE_SEG 0x18
-#define CACHE_RAM_DATA_SEG 0x20
-
.align 4
.globl protected_stage0
protected_stage0:
@@ -169,7 +166,7 @@
movl %eax, %esp
/* Load a different set of data segments */
- movw $CACHE_RAM_DATA_SEG, %ax
+ movw $ROM_DATA_SEG, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
Index: arch/x86/i586/stage0.S
===================================================================
--- arch/x86/i586/stage0.S (revision 989)
+++ arch/x86/i586/stage0.S (working copy)
@@ -5,7 +5,7 @@
* Copyright (C) 2005 Eswar Nallusamy, LANL
* Copyright (C) 2005 Tyan
* (Written by Yinghai Lu <[EMAIL PROTECTED]> for Tyan)
- * Copyright (C) 2007 coresystems GmbH
+ * Copyright (C) 2007-2008 coresystems GmbH
* (Written by Stefan Reinauer <[EMAIL PROTECTED]> for coresystems GmbH)
* Copyright (C) 2008 Carl-Daniel Hailfinger
*
@@ -30,9 +30,6 @@
#define ROM_CODE_SEG 0x08
#define ROM_DATA_SEG 0x10
-#define CACHE_RAM_CODE_SEG 0x18
-#define CACHE_RAM_DATA_SEG 0x20
-
/* When we come here we are in protected mode. We expand the stack
* and copy the data segment from ROM to the memory.
*
@@ -319,7 +316,7 @@
movl %eax, %esp
/* Load a different set of data segments */
- movw $CACHE_RAM_DATA_SEG, %ax
+ movw $ROM_DATA_SEG, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
Index: arch/x86/stage0_common.S
===================================================================
--- arch/x86/stage0_common.S (revision 989)
+++ arch/x86/stage0_common.S (working copy)
@@ -2,6 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 1999 Ronald G. Minnich
+ * Copyright (C) 2007-2008 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -51,8 +52,6 @@
/* Restore BIST result. */
movl %ebp, %eax
- // port80_post(0x23)
-
/* Now we are in protected mode. Jump to a 32 bit code segment. */
data32 ljmp $ROM_CODE_SEG, $protected_stage0
@@ -114,13 +113,17 @@
.word 0xffff, 0x0000
.byte 0x00, 0x93, 0xcf, 0x00
- /* selgdt 0x18, flat code segment for CAR */
+ /* selgdt 0x18, real mode code F segment */
.word 0xffff, 0x0000
- .byte 0x00, 0x9b, 0xcf, 0x00
+ .byte 0x0f, 0x9b, 0x00, 0x00
- /* selgdt 0x20, flat data segment for CAR */
+ /* selgdt 0x20, real mode data 0 segment */
.word 0xffff, 0x0000
- .byte 0x00, 0x93, 0xcf, 0x00
+ .byte 0x00, 0x93, 0x00, 0x00
+
+ /* selgdt 0x28, real mode code 0 segment */
+ .word 0xffff, 0x0000
+ .byte 0x00, 0x9b, 0x00, 0x00
gdt_end:
/* Reset vector. */
--
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