On 12.11.2008 16:15, Stefan Reinauer wrote: > Carl-Daniel Hailfinger wrote: > >> On 12.11.2008 15:12, [EMAIL PROTECTED] wrote: >> >> >>> Author: stepan >>> Date: 2008-11-12 15:12:32 +0100 (Wed, 12 Nov 2008) >>> New Revision: 1002 >>> >>> Added: >>> coreboot-v3/arch/x86/intel/core2/stage0.S >>> Modified: >>> coreboot-v3/arch/x86/Makefile >>> Log: >>> initial intel core car code. >>> >>> Signed-off-by: Stefan Reinauer <[EMAIL PROTECTED]> >>> Acked-by: Stefan Reinauer <[EMAIL PROTECTED]> >>> >>> >>> >> Hey, that's unfair! ;-) I was working on exactly the same piece of code. >> Oh well. I'll prepare my cleanup patches for v3, then. >> >> > > Sorry, I thought I mentioned that I'm working on this. >
Yes, but since it's been a while since you said that, I assumed the port was preempted by higher priority work on v2 targets. > Do you have 945 hardware around for testing? > No. > There's enough work to be done. Right now the board does not even compile. > I'll tackle the Core2 CAR code in v3 and clean it up a bit (and port cleanups from the Core2 code to other CPUs) and try to get it to compile. Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
