On 17.11.2008 14:28, Stefan Reinauer wrote: > Carl-Daniel Hailfinger wrote: > >> Check for failed SPI command execution in flashrom. Although SPI itself >> does not have a mechanism to signal command failure, the SPI host may be >> unable to send a given command over the wire due to security or hardware >> limitations. The current code ignores these mechanisms completely and >> simply assumes almost every command succeeds. Complain if SPI command >> execution fails. >> >> Since locked down Intel chipsets (like the one we had problems with >> earlier) only allow a small subset of commands, find the common subset >> of commands between the chipset and the ROM in the chip erase case. That >> is accomplished by the new spi_chip_erase_60_c7() which can be used for >> chips supporting both 0x60 and 0xc7 chip erase commands. >> >> Both parts of the patch address problems seen in the real world. The >> increased verbosity for the error case will help us diagnose and address >> problems better. >> >> Signed-off-by: Carl-Daniel Hailfinger <[EMAIL PROTECTED]> >> >> >> > Acked-by: Stefan Reinauer <[EMAIL PROTECTED]> >
Thanks, committed in r3757. Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
