Hi,
After reading the rest of this (old) thread, I'm thinking that maybe a good
compromise between duplicating or including code could be to include the C
files (which don't need to be modified for this port), and duplicate the
config files which need more intrusive changes.
This is a resynced version which does that. Please consider appliing
it. Status is almost the same as before:
System boots and is usable with usb keyboard.
works:
- serial port
- vga (old pci card)
- memtest86+ succeeds with minor raminit.c tweaking (see the
"[PATCH] Athlon64 K8 fixes" thread)
- ata disk
- usb
doesn't:
- ps/2 keyboard
- vga pci-e card (??)
- any other pci card I tried
wasn't tested:
- sata
- game port
- onboard audio (not supported by alsa anyway)
- ps/2 mouse
--
Robert Millan
The DRM opt-in fallacy: "Your data belongs to us. We will decide when (and
how) you may access your data; but nobody's threatening your freedom: we
still allow you to remove your data and not access it at all."
Signed-off-by: Robert Millan <[EMAIL PROTECTED]>
The following files are copied from the repository:
svn mkdir src/mainboard/asus/a8n5x
svn copy src/mainboard/asus/a8n_e/Config.lb src/mainboard/asus/a8n5x/
svn copy src/mainboard/asus/a8n_e/Options.lb src/mainboard/asus/a8n5x/
svn copy src/mainboard/asus/a8n_e/cmos.layout src/mainboard/asus/a8n5x/
svn mkdir targets/asus/a8n5x
svn copy targets/asus/a8n_e/Config.lb targets/asus/a8n5x/
Index: src/mainboard/asus/a8n5x/Config.lb
===================================================================
--- src/mainboard/asus/a8n5x/Config.lb (revision 0)
+++ src/mainboard/asus/a8n5x/Config.lb (working copy)
@@ -165,66 +165,33 @@ chip northbridge/amd/amdk8/root_complex
device pci 0.0 on end # HT
device pci 1.0 on # LPC
chip superio/ite/it8712f # Super I/O
- device pnp 2e.0 on # Floppy
+ device pnp 2e.7 on # Floppy
io 0x60 = 0x3f0
irq 0x70 = 6
drq 0x74 = 2
end
- device pnp 2e.1 on # Com1
+ device pnp 2e.8 on # Com1
io 0x60 = 0x3f8
irq 0x70 = 4
end
- device pnp 2e.2 off # Com2 (N/A on this board)
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 2e.3 on # Parallel port
+ device pnp 2e.9 on # Parallel port
io 0x60 = 0x378
irq 0x70 = 7
drq 0x74 = 3
end
- device pnp 2e.4 on # Environment controller
- io 0x60 = 0x290
- io 0x62 = 0x0000
- irq 0x70 = 0x00
- end
- device pnp 2e.5 on # PS/2 keyboard
+ device pnp 2e.a on # PS/2 keyboard
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1
irq 0x71 = 2
end
- device pnp 2e.6 on # PS/2 mouse
- irq 0x70 = 12
- irq 0x71 = 2
- end
- device pnp 2e.7 on # GPIO config
- io 0x60 = 0x0800
- # Set GPIO 1 & 2
- io 0x25 = 0x0000
- # Set GPIO 3 & 4
- io 0x27 = 0x2540
- # GPIO Polarity for Set 3
- io 0xb2 = 0x2100
- # GPIO Pin Internal Pull up for Set 3
- io 0xba = 0x0100
- # Simple I/O register config
- io 0xc0 = 0x0000
- io 0xc2 = 0x2540
- io 0xc8 = 0x0000
- io 0xca = 0x0500
- end
- device pnp 2e.8 on # Midi port
+ device pnp 2e.b on # Midi port
io 0x60 = 0x300
irq 0x70 = 10
end
- device pnp 2e.9 on # Game port
+ device pnp 2e.c on # Game port
io 0x60 = 0x201
end
- device pnp 2e.a off # IR (N/A on this board)
- io 0x60 = 0x310
- irq 0x70 = 11
- end
end
end
device pci 1.1 on # SM 0
Index: src/mainboard/asus/a8n5x/mptable.c
===================================================================
--- src/mainboard/asus/a8n5x/mptable.c (revision 0)
+++ src/mainboard/asus/a8n5x/mptable.c (revision 0)
@@ -0,0 +1 @@
+#include "../mainboard/asus/a8n_e/mptable.c"
Index: src/mainboard/asus/a8n5x/irq_tables.c
===================================================================
--- src/mainboard/asus/a8n5x/irq_tables.c (revision 0)
+++ src/mainboard/asus/a8n5x/irq_tables.c (revision 0)
@@ -0,0 +1 @@
+#include "../mainboard/asus/a8n_e/irq_tables.c"
Index: src/mainboard/asus/a8n5x/mainboard.c
===================================================================
--- src/mainboard/asus/a8n5x/mainboard.c (revision 0)
+++ src/mainboard/asus/a8n5x/mainboard.c (revision 0)
@@ -0,0 +1 @@
+#include "../mainboard/asus/a8n_e/mainboard.c"
Index: src/mainboard/asus/a8n5x/cache_as_ram_auto.c
===================================================================
--- src/mainboard/asus/a8n5x/cache_as_ram_auto.c (revision 0)
+++ src/mainboard/asus/a8n5x/cache_as_ram_auto.c (revision 0)
@@ -0,0 +1 @@
+#include "../mainboard/asus/a8n_e/cache_as_ram_auto.c"
Index: src/mainboard/asus/a8n5x/get_bus_conf.c
===================================================================
--- src/mainboard/asus/a8n5x/get_bus_conf.c (revision 0)
+++ src/mainboard/asus/a8n5x/get_bus_conf.c (revision 0)
@@ -0,0 +1 @@
+#include "../mainboard/asus/a8n_e/get_bus_conf.c"
Index: targets/asus/a8n5x/Config.lb
===================================================================
--- targets/asus/a8n5x/Config.lb (revision 0)
+++ targets/asus/a8n5x/Config.lb (working copy)
@@ -19,8 +19,8 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-target asus_a8n_e
-mainboard asus/a8n_e
+target asus_a8n5x
+mainboard asus/a8n5x
romimage "normal"
option USE_FAILOVER_IMAGE = 0
--
coreboot mailing list: [email protected]
http://www.coreboot.org/mailman/listinfo/coreboot
