Jordan,
Sorry I obviously missed the point of your questions. I'd forgotten that
the fix went in to make all devices found in the dts be "on the mainboard."
Here's a new patch that updates the dts with that in mind. It also fixes
the subsystem_vendor, which was broken in the last patch.
I appreciate the sanity check.
Signed-off-by: Myles Watson <[EMAIL PROTECTED]>
Thanks,
Myles
Index: svn/mainboard/emulation/qemu-x86/dts
===================================================================
--- svn.orig/mainboard/emulation/qemu-x86/dts
+++ svn/mainboard/emulation/qemu-x86/dts
@@ -21,21 +21,24 @@
/{
mainboard_vendor = "Emulation";
mainboard_name = "QEMU x86";
- mainboard_pci_subsystem_vendor = "0x15ad";
- mainboard_pci_subsystem_device = "0x1976";
+ subsystem_vendor = "0x15ad";
+ subsystem_device = "0x1976";
device_operations = "qemuvga_pci_ops_dev";
cpus {};
[EMAIL PROTECTED] {
/config/("northbridge/intel/i440bxemulation/domain");
- [EMAIL PROTECTED] {
- [EMAIL PROTECTED],0 {
- };
- [EMAIL PROTECTED],1 {
- /config/("southbridge/intel/i82371eb/ide");
- subsystem_vendor = "0x15ad";
- subsystem_device = "0x1976";
- on_mainboard;
- };
+ [EMAIL PROTECTED],0 {
};
+ [EMAIL PROTECTED],0 {
+ /config/("southbridge/intel/i82371eb/isa");
+ };
+ [EMAIL PROTECTED],1 {
+ /config/("southbridge/intel/i82371eb/ide");
+ };
+ [EMAIL PROTECTED],3 {
+ /config/("southbridge/intel/i82371eb/acpi");
+ };
+ /* PCI 2.0 and 3.0 are plugged in. */
+ /* 2.0 is the Cirrus VGA card. 3.0 is a nic. */
};
};
Index: svn/southbridge/intel/i82371eb/acpi
===================================================================
--- /dev/null
+++ svn/southbridge/intel/i82371eb/acpi
@@ -0,0 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007 Ronald G. Minnich <[EMAIL PROTECTED]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+{
+ device_operations = "i82371eb_acpi";
+};
Index: svn/southbridge/intel/i82371eb/ide
===================================================================
--- svn.orig/southbridge/intel/i82371eb/ide
+++ svn/southbridge/intel/i82371eb/ide
@@ -19,7 +19,7 @@
*/
{
- ide0_enable = "0";
- ide1_enable = "0";
+ ide0_enable = "1";
+ ide1_enable = "1";
device_operations = "i82371eb_ide";
};
Index: svn/southbridge/intel/i82371eb/isa
===================================================================
--- /dev/null
+++ svn/southbridge/intel/i82371eb/isa
@@ -0,0 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007 Ronald G. Minnich <[EMAIL PROTECTED]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+{
+ device_operations = "i82371eb_isa";
+};
--
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