coreboot wrote:
> * patchstatus: there is no patch => patch needs review
Attached.
//Peter
flashrom: Remove flash image identification heuristic
This heuristic would always run but only checked for the case of crossflashing
what looked like a coreboot image when also booted with coreboot, and would
require to rerun flashrom with --force to continue the write/verify operation.
Signed-off-by: Peter Stuge <[EMAIL PROTECTED]>
Index: flash.h
===================================================================
--- flash.h (revision 3803)
+++ flash.h (working copy)
@@ -454,7 +454,6 @@
int map_flash_registers(struct flashchip *flash);
/* layout.c */
-int show_id(uint8_t *bios, int size, int force);
int read_romlayout(char *name);
int find_romentry(char *name);
int handle_romentries(uint8_t *buffer, uint8_t *content);
Index: flashrom.c
===================================================================
--- flashrom.c (revision 3803)
+++ flashrom.c (working copy)
@@ -635,7 +635,6 @@
}
fread(buf, sizeof(char), size, image);
- show_id(buf, size, force);
fclose(image);
}
Index: layout.c
===================================================================
--- layout.c (revision 3803)
+++ layout.c (working copy)
@@ -40,96 +40,6 @@
romlayout_t rom_entries[MAX_ROMLAYOUT];
-static char *def_name = "DEFAULT";
-
-int show_id(uint8_t *bios, int size, int force)
-{
- unsigned int *walk;
- unsigned int mb_part_offset, mb_vendor_offset;
- char *mb_part, *mb_vendor;
-
- mainboard_vendor = def_name;
- mainboard_part = def_name;
-
- walk = (unsigned int *)(bios + size - 0x10);
- walk--;
-
- if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) {
- /* We might have an NVIDIA chipset BIOS which stores the ID
- * information at a different location.
- */
- walk = (unsigned int *)(bios + size - 0x80);
- walk--;
- }
-
- /*
- * Check if coreboot last image size is 0 or not a multiple of 1k or
- * bigger than the chip or if the pointers to vendor ID or mainboard ID
- * are outside the image of if the start of ID strings are nonsensical
- * (nonprintable and not \0).
- */
- mb_part_offset = *(walk - 1);
- mb_vendor_offset = *(walk - 2);
- if ((*walk) == 0 || ((*walk) & 0x3ff) != 0 || (*walk) > size ||
- mb_part_offset > size || mb_vendor_offset > size) {
- printf("Flash image seems to be a legacy BIOS. Disabling checks.\n");
- return 0;
- }
-
- mb_part = (char *)(bios + size - mb_part_offset);
- mb_vendor = (char *)(bios + size - mb_vendor_offset);
- if (!isprint((unsigned char)*mb_part) ||
- !isprint((unsigned char)*mb_vendor)) {
- printf("Flash image seems to have garbage in the ID location."
- " Disabling checks.\n");
- return 0;
- }
-
- printf_debug("coreboot last image size "
- "(not ROM size) is %d bytes.\n", *walk);
-
- mainboard_part = strdup(mb_part);
- mainboard_vendor = strdup(mb_vendor);
- printf_debug("Manufacturer: %s\n", mainboard_vendor);
- printf_debug("Mainboard ID: %s\n", mainboard_part);
-
- /*
- * If lb_vendor is not set, the coreboot table was
- * not found. Nor was -m VENDOR:PART specified.
- */
- if (!lb_vendor || !lb_part) {
- printf("Note: If the following flash access fails, "
- "try -m <vendor>:<mainboard>.\n");
- return 0;
- }
-
- /* These comparisons are case insensitive to make things
- * a little less user^Werror prone.
- */
- if (!strcasecmp(mainboard_vendor, lb_vendor) &&
- !strcasecmp(mainboard_part, lb_part)) {
- printf_debug("This firmware image matches "
- "this motherboard.\n");
- } else {
- if (force) {
- printf("WARNING: This firmware image does not "
- "seem to fit to this machine - forcing it.\n");
- } else {
- printf("ERROR: Your firmware image (%s:%s) does not "
- "appear to\n be correct for the detected "
- "mainboard (%s:%s)\n\nOverride with --force if you "
- "are absolutely sure that you\nare using a correct "
- "image for this mainboard or override\nthe detected "
- "values with --mainboard <vendor>:<mainboard>.\n\n",
- mainboard_vendor, mainboard_part, lb_vendor,
- lb_part);
- exit(1);
- }
- }
-
- return 0;
-}
-
int read_romlayout(char *name)
{
FILE *romlayout;
--
coreboot mailing list: [email protected]
http://www.coreboot.org/mailman/listinfo/coreboot