Author: stepan Date: 2008-12-13 21:51:34 +0100 (Sat, 13 Dec 2008) New Revision: 3812
Modified: trunk/coreboot-v2/src/arch/i386/boot/coreboot_table.c trunk/coreboot-v2/src/arch/i386/boot/coreboot_table.h trunk/coreboot-v2/src/config/Options.lb trunk/coreboot-v2/src/include/boot/coreboot_tables.h trunk/coreboot-v2/src/mainboard/amd/dbm690t/Options.lb trunk/coreboot-v2/src/mainboard/amd/dbm690t/mainboard.c trunk/coreboot-v2/src/southbridge/amd/rs690/rs690_cmn.c Log: Move mainboard specific changes to the coreboot memory table into the mainboard specific code. (And add a hook to allow other mainboards do a similar thing if required) Signed-off-by: Stefan Reinauer <[email protected]> Acked-by: Ronald G Minnich <[email protected]> Modified: trunk/coreboot-v2/src/arch/i386/boot/coreboot_table.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/boot/coreboot_table.c 2008-12-12 03:40:21 UTC (rev 3811) +++ trunk/coreboot-v2/src/arch/i386/boot/coreboot_table.c 2008-12-13 20:51:34 UTC (rev 3812) @@ -357,7 +357,8 @@ } } -static void lb_add_memory_range(struct lb_memory *mem, +/* This function is used in mainboard specific code, too */ +void lb_add_memory_range(struct lb_memory *mem, uint32_t type, uint64_t start, uint64_t size) { lb_remove_memory_range(mem, start, size); @@ -447,15 +448,10 @@ lb_add_memory_range(mem, LB_MEM_TABLE, rom_table_start, rom_table_end-rom_table_start); - /* AMD rs690 chip, we should remove the UMA from system memory. */ -#if (CONFIG_GFXUMA == 1) - printk_info("uma_memory_start=0x%x, uma_memory_size=0x%x \n", - uma_memory_start, uma_memory_size); - lb_add_memory_range(mem, LB_MEM_TABLE, - uma_memory_start, uma_memory_size); +#if (HAVE_MAINBOARD_RESOURCES == 1) + add_mainboard_resources(mem); #endif - /* Note: * I assume that there is always memory at immediately after * the low_table_end. This means that after I setup the coreboot table. Modified: trunk/coreboot-v2/src/arch/i386/boot/coreboot_table.h =================================================================== --- trunk/coreboot-v2/src/arch/i386/boot/coreboot_table.h 2008-12-12 03:40:21 UTC (rev 3811) +++ trunk/coreboot-v2/src/arch/i386/boot/coreboot_table.h 2008-12-13 20:51:34 UTC (rev 3812) @@ -26,4 +26,7 @@ extern struct cmos_option_table option_table; +/* defined by mainboard.c if the mainboard requires extra resources */ +int add_mainboard_resources(struct lb_memory *mem); + #endif /* COREBOOT_TABLE_H */ Modified: trunk/coreboot-v2/src/config/Options.lb =================================================================== --- trunk/coreboot-v2/src/config/Options.lb 2008-12-12 03:40:21 UTC (rev 3811) +++ trunk/coreboot-v2/src/config/Options.lb 2008-12-13 20:51:34 UTC (rev 3812) @@ -1101,6 +1101,12 @@ comment "GFX UMA" end +define HAVE_MAINBOARD_RESOURCES + default 0 + export always + comment "Enable if the mainboard/chipset requires extra entries in the memory map" +end + define CONFIG_SPLASH_GRAPHIC default 0 export used Modified: trunk/coreboot-v2/src/include/boot/coreboot_tables.h =================================================================== --- trunk/coreboot-v2/src/include/boot/coreboot_tables.h 2008-12-12 03:40:21 UTC (rev 3811) +++ trunk/coreboot-v2/src/include/boot/coreboot_tables.h 2008-12-13 20:51:34 UTC (rev 3812) @@ -43,12 +43,6 @@ * See also: util/lbtdump/lbtdump.c */ -/* AMD rs690 chip, declare global variables. */ -#if (CONFIG_GFXUMA == 1) - unsigned long uma_memory_start, uma_memory_size; -#endif - - struct lb_uint64 { uint32_t lo; uint32_t hi; Modified: trunk/coreboot-v2/src/mainboard/amd/dbm690t/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/dbm690t/Options.lb 2008-12-12 03:40:21 UTC (rev 3811) +++ trunk/coreboot-v2/src/mainboard/amd/dbm690t/Options.lb 2008-12-13 20:51:34 UTC (rev 3812) @@ -91,6 +91,7 @@ uses CONFIG_VIDEO_MB uses CONFIG_GFXUMA +uses HAVE_MAINBOARD_RESOURCES ### ### Build options @@ -299,6 +300,7 @@ default CONFIG_VIDEO_MB=1 default CONFIG_GFXUMA=1 +default HAVE_MAINBOARD_RESOURCES=1 ### End Options.lb end Modified: trunk/coreboot-v2/src/mainboard/amd/dbm690t/mainboard.c =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/dbm690t/mainboard.c 2008-12-12 03:40:21 UTC (rev 3811) +++ trunk/coreboot-v2/src/mainboard/amd/dbm690t/mainboard.c 2008-12-13 20:51:34 UTC (rev 3812) @@ -41,6 +41,8 @@ #define ADT7461_write_byte(address, val) \ do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val) +unsigned long uma_memory_start, uma_memory_size; + /******************************************************** * dbm690t uses a BCM5789 as on-board NIC. * It has a pin named LOW_POWER to enable it into LOW POWER state. @@ -241,13 +243,24 @@ get_ide_dma66(); set_thermal_config(); } + +int add_mainboard_resources(struct lb_memory *mem) +{ + /* UMA is removed from system memory in the northbridge code, but + * in some circumstances we want the memory mentioned as reserved. + */ +#if (CONFIG_GFXUMA == 1) + printk_info("uma_memory_start=0x%x, uma_memory_size=0x%x \n", + uma_memory_start, uma_memory_size); + lb_add_memory_range(mem, LB_MEM_RESERVED, + uma_memory_start, uma_memory_size); +#endif +} /* * CONFIG_CHIP_NAME defined in Option.lb. */ struct chip_operations mainboard_amd_dbm690t_ops = { -#if CONFIG_CHIP_NAME == 1 - CHIP_NAME("AMD Dbm690t Mainboard") -#endif - .enable_dev = dbm690t_enable, + CHIP_NAME("AMD DBM690T Mainboard") + .enable_dev = dbm690t_enable, }; Modified: trunk/coreboot-v2/src/southbridge/amd/rs690/rs690_cmn.c =================================================================== --- trunk/coreboot-v2/src/southbridge/amd/rs690/rs690_cmn.c 2008-12-12 03:40:21 UTC (rev 3811) +++ trunk/coreboot-v2/src/southbridge/amd/rs690/rs690_cmn.c 2008-12-13 20:51:34 UTC (rev 3812) @@ -307,6 +307,8 @@ */ void rs690_set_tom(device_t nb_dev) { + extern unsigned long uma_memory_start; + /* set TOM */ pci_write_config32(nb_dev, 0x90, uma_memory_start); nbmc_write_index(nb_dev, 0x1e, uma_memory_start); -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
