Author: cozzie Date: 2008-12-18 03:00:55 +0100 (Thu, 18 Dec 2008) New Revision: 1078
Modified: coreboot-v3/Kconfig coreboot-v3/arch/x86/Kconfig coreboot-v3/arch/x86/mc146818rtc.c coreboot-v3/mainboard/adl/Kconfig coreboot-v3/mainboard/amd/Kconfig coreboot-v3/mainboard/amp/Kconfig coreboot-v3/mainboard/artecgroup/Kconfig coreboot-v3/mainboard/emulation/Kconfig coreboot-v3/mainboard/gigabyte/Kconfig coreboot-v3/mainboard/jetway/Kconfig coreboot-v3/mainboard/kontron/Kconfig coreboot-v3/mainboard/pcengines/Kconfig coreboot-v3/mainboard/via/Kconfig Log: Move OPTION_TABLE to a menu config option, and default it to enabled. This allows a user/developer to disable the option table, so it doesn't overwrite whatever the factory BIOS has written. Also fix building with OPTION_TABLE disabled. Signed-off-by: Corey Osgood <[email protected]> Acked-by: Peter Stuge <[email protected]> Modified: coreboot-v3/Kconfig =================================================================== --- coreboot-v3/Kconfig 2008-12-17 21:17:01 UTC (rev 1077) +++ coreboot-v3/Kconfig 2008-12-18 02:00:55 UTC (rev 1078) @@ -53,6 +53,14 @@ help Append an extra string to the end of the coreboot version. +config OPTION_TABLE + bool "CMOS Option Table" + default y + help + This option is used to determine whether the mainboard has + a battery backed up real time clock with CMOS NVRAM, or if you want + to use it. + config BEEPS bool "Enable beeps upon certain coreboot events" depends EXPERT Modified: coreboot-v3/arch/x86/Kconfig =================================================================== --- coreboot-v3/arch/x86/Kconfig 2008-12-17 21:17:01 UTC (rev 1077) +++ coreboot-v3/arch/x86/Kconfig 2008-12-18 02:00:55 UTC (rev 1078) @@ -141,13 +141,6 @@ help Configure for the type of crossbar on the mainboard. -config OPTION_TABLE - boolean - help - This option is used to determine whether the mainboard has - a battery backed up real time clock with CMOS NVRAM. - It is usually set in mainboard/*/Kconfig. - config PIRQ_TABLE boolean help Modified: coreboot-v3/arch/x86/mc146818rtc.c =================================================================== --- coreboot-v3/arch/x86/mc146818rtc.c 2008-12-17 21:17:01 UTC (rev 1077) +++ coreboot-v3/arch/x86/mc146818rtc.c 2008-12-18 02:00:55 UTC (rev 1078) @@ -196,6 +196,7 @@ int get_option(void *dest, char *name) { +#if CONFIG_OPTION_TABLE // struct cmos_option_table *option_table; struct cmos_option_table *ct; struct cmos_entries *ce; @@ -224,7 +225,6 @@ if(!rtc_checksum_valid(CB_CKS_RANGE_START, CB_CKS_RANGE_END,CB_CKS_LOC)) return(-4); -#ifdef CONFIG_OPTION_TABLE return(0); #else return -2; Modified: coreboot-v3/mainboard/adl/Kconfig =================================================================== --- coreboot-v3/mainboard/adl/Kconfig 2008-12-17 21:17:01 UTC (rev 1077) +++ coreboot-v3/mainboard/adl/Kconfig 2008-12-18 02:00:55 UTC (rev 1078) @@ -27,7 +27,6 @@ bool "MSM800SEV" select ARCH_X86 select CPU_AMD_GEODELX - select OPTION_TABLE select NORTHBRIDGE_AMD_GEODELX select SOUTHBRIDGE_AMD_CS5536 select SUPERIO_WINBOND_W83627HF Modified: coreboot-v3/mainboard/amd/Kconfig =================================================================== --- coreboot-v3/mainboard/amd/Kconfig 2008-12-17 21:17:01 UTC (rev 1077) +++ coreboot-v3/mainboard/amd/Kconfig 2008-12-18 02:00:55 UTC (rev 1078) @@ -27,7 +27,6 @@ bool "DB800" select ARCH_X86 select CPU_AMD_GEODELX - select OPTION_TABLE select NORTHBRIDGE_AMD_GEODELX select SOUTHBRIDGE_AMD_CS5536 select SUPERIO_WINBOND_W83627HF @@ -38,7 +37,6 @@ config BOARD_AMD_DBM690T bool "dbm690t" select ARCH_X86 - select OPTION_TABLE select CPU_AMD_K8 select NORTHBRIDGE_AMD_K8 select SOUTHBRIDGE_AMD_SB600 @@ -52,7 +50,6 @@ bool "Norwich" select ARCH_X86 select CPU_AMD_GEODELX - select OPTION_TABLE select NORTHBRIDGE_AMD_GEODELX select SOUTHBRIDGE_AMD_CS5536 select PIRQ_TABLE @@ -62,7 +59,6 @@ config BOARD_AMD_SERENGETI bool "Serengeti" select ARCH_X86 - select OPTION_TABLE select CPU_AMD_K8 select NORTHBRIDGE_AMD_K8 select SOUTHBRIDGE_AMD_AMD8111 Modified: coreboot-v3/mainboard/amp/Kconfig =================================================================== --- coreboot-v3/mainboard/amp/Kconfig 2008-12-17 21:17:01 UTC (rev 1077) +++ coreboot-v3/mainboard/amp/Kconfig 2008-12-18 02:00:55 UTC (rev 1078) @@ -27,7 +27,6 @@ bool "TinyGX" select ARCH_X86 select CPU_AMD_GEODELX - select OPTION_TABLE select NORTHBRIDGE_AMD_GEODELX select SOUTHBRIDGE_AMD_CS5536 select SUPERIO_ITE_IT8716F Modified: coreboot-v3/mainboard/artecgroup/Kconfig =================================================================== --- coreboot-v3/mainboard/artecgroup/Kconfig 2008-12-17 21:17:01 UTC (rev 1077) +++ coreboot-v3/mainboard/artecgroup/Kconfig 2008-12-18 02:00:55 UTC (rev 1078) @@ -27,7 +27,6 @@ bool "DBE61" select ARCH_X86 select CPU_AMD_GEODELX - select OPTION_TABLE select NORTHBRIDGE_AMD_GEODELX select SOUTHBRIDGE_AMD_CS5536 select PIRQ_TABLE @@ -38,7 +37,6 @@ bool "DBE62" select ARCH_X86 select CPU_AMD_GEODELX - select OPTION_TABLE select NORTHBRIDGE_AMD_GEODELX select SOUTHBRIDGE_AMD_CS5536 select PIRQ_TABLE Modified: coreboot-v3/mainboard/emulation/Kconfig =================================================================== --- coreboot-v3/mainboard/emulation/Kconfig 2008-12-17 21:17:01 UTC (rev 1077) +++ coreboot-v3/mainboard/emulation/Kconfig 2008-12-18 02:00:55 UTC (rev 1078) @@ -28,7 +28,6 @@ bool "QEMU x86" select ARCH_X86 select CPU_I586 - select OPTION_TABLE select NORTHBRIDGE_INTEL_I440BXEMULATION select SOUTHBRIDGE_INTEL_I82371EB help Modified: coreboot-v3/mainboard/gigabyte/Kconfig =================================================================== --- coreboot-v3/mainboard/gigabyte/Kconfig 2008-12-17 21:17:01 UTC (rev 1077) +++ coreboot-v3/mainboard/gigabyte/Kconfig 2008-12-18 02:00:55 UTC (rev 1078) @@ -26,7 +26,6 @@ config BOARD_GIGABYTE_M57SLI bool "GA-M57SLI-S4" select ARCH_X86 - select OPTION_TABLE select CPU_AMD_K8 select NORTHBRIDGE_AMD_K8 select SOUTHBRIDGE_NVIDIA_MCP55 Modified: coreboot-v3/mainboard/jetway/Kconfig =================================================================== --- coreboot-v3/mainboard/jetway/Kconfig 2008-12-17 21:17:01 UTC (rev 1077) +++ coreboot-v3/mainboard/jetway/Kconfig 2008-12-18 02:00:55 UTC (rev 1078) @@ -25,7 +25,6 @@ bool "J7F2 Series (INCOMPLETE)" select ARCH_X86 select CPU_VIA_C7 - select OPTION_TABLE select NORTHBRIDGE_VIA_CN700 select SOUTHBRIDGE_VIA_VT8237 select SUPERIO_FINTEK_F71805F Modified: coreboot-v3/mainboard/kontron/Kconfig =================================================================== --- coreboot-v3/mainboard/kontron/Kconfig 2008-12-17 21:17:01 UTC (rev 1077) +++ coreboot-v3/mainboard/kontron/Kconfig 2008-12-18 02:00:55 UTC (rev 1078) @@ -27,7 +27,6 @@ bool "986LCD-M" select ARCH_X86 select CPU_INTEL_CORE2 - select OPTION_TABLE select NORTHBRIDGE_INTEL_I945 select SOUTHBRIDGE_INTEL_I82801GX select SUPERIO_WINBOND_W83627THG Modified: coreboot-v3/mainboard/pcengines/Kconfig =================================================================== --- coreboot-v3/mainboard/pcengines/Kconfig 2008-12-17 21:17:01 UTC (rev 1077) +++ coreboot-v3/mainboard/pcengines/Kconfig 2008-12-18 02:00:55 UTC (rev 1078) @@ -27,7 +27,6 @@ bool "ALIX.1C" select ARCH_X86 select CPU_AMD_GEODELX - select OPTION_TABLE select NORTHBRIDGE_AMD_GEODELX select SOUTHBRIDGE_AMD_CS5536 select SUPERIO_WINBOND_W83627HF @@ -39,7 +38,6 @@ bool "ALIX.2C3" select ARCH_X86 select CPU_AMD_GEODELX - select OPTION_TABLE select NORTHBRIDGE_AMD_GEODELX select SOUTHBRIDGE_AMD_CS5536 select PIRQ_TABLE Modified: coreboot-v3/mainboard/via/Kconfig =================================================================== --- coreboot-v3/mainboard/via/Kconfig 2008-12-17 21:17:01 UTC (rev 1077) +++ coreboot-v3/mainboard/via/Kconfig 2008-12-18 02:00:55 UTC (rev 1078) @@ -26,7 +26,6 @@ bool "EPIA-CN" select ARCH_X86 select CPU_VIA_C7 - select OPTION_TABLE select NORTHBRIDGE_VIA_CN700 select SOUTHBRIDGE_VIA_VT8237 select SUPERIO_VIA_VT1211 -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
