Author: myles Date: 2008-12-18 19:24:11 +0100 (Thu, 18 Dec 2008) New Revision: 3818
Modified: trunk/coreboot-v2/src/arch/i386/include/arch/acpi.h trunk/coreboot-v2/src/cpu/x86/lapic/lapic_cpu_init.c trunk/coreboot-v2/src/include/device/pci.h trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_f.h trunk/coreboot-v2/src/southbridge/amd/amd8111/amd8111.c trunk/coreboot-v2/src/southbridge/amd/amd8111/amd8111_nic.c Log: This patch gets rid of all the implicit definition warnings for serengeti except get_nodes. Signed-off-by: Myles Watson <[email protected]> Acked-by: Marc Jones <[email protected]> Modified: trunk/coreboot-v2/src/arch/i386/include/arch/acpi.h =================================================================== --- trunk/coreboot-v2/src/arch/i386/include/arch/acpi.h 2008-12-18 02:18:45 UTC (rev 3817) +++ trunk/coreboot-v2/src/arch/i386/include/arch/acpi.h 2008-12-18 18:24:11 UTC (rev 3818) @@ -317,6 +317,8 @@ unsigned long acpi_create_srat_lapics(unsigned long current); void acpi_create_srat(acpi_srat_t *srat); +void acpi_create_slit(acpi_slit_t *slit); + void acpi_create_hpet(acpi_hpet_t *hpet); void acpi_create_mcfg(acpi_mcfg_t *mcfg); Modified: trunk/coreboot-v2/src/cpu/x86/lapic/lapic_cpu_init.c =================================================================== --- trunk/coreboot-v2/src/cpu/x86/lapic/lapic_cpu_init.c 2008-12-18 02:18:45 UTC (rev 3817) +++ trunk/coreboot-v2/src/cpu/x86/lapic/lapic_cpu_init.c 2008-12-18 18:24:11 UTC (rev 3818) @@ -435,6 +435,8 @@ #if WAIT_BEFORE_CPUS_INIT==0 #define cpus_ready_for_init() do {} while(0) +#else + void cpus_ready_for_init(void); #endif #if HAVE_SMI_HANDLER Modified: trunk/coreboot-v2/src/include/device/pci.h =================================================================== --- trunk/coreboot-v2/src/include/device/pci.h 2008-12-18 02:18:45 UTC (rev 3817) +++ trunk/coreboot-v2/src/include/device/pci.h 2008-12-18 18:24:11 UTC (rev 3818) @@ -72,6 +72,10 @@ unsigned pci_find_capability(device_t dev, unsigned cap); struct resource *pci_get_resource(struct device *dev, unsigned long index); void pci_dev_set_subsystem(device_t dev, unsigned vendor, unsigned device); +void pci_dev_init(struct device *dev); +void pci_level_irq(unsigned char intNum); +void pci_assign_irqs(unsigned bus, unsigned slot, + const unsigned char pIntAtoD[4]); #define PCI_IO_BRIDGE_ALIGN 4096 #define PCI_MEM_BRIDGE_ALIGN (1024*1024) Modified: trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_f.h =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_f.h 2008-12-18 02:18:45 UTC (rev 3817) +++ trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_f.h 2008-12-18 18:24:11 UTC (rev 3818) @@ -521,6 +521,8 @@ #ifdef __ROMCC__ static void soft_reset(void); +#else +void hard_reset(void); #endif static void wait_all_core0_mem_trained(struct sys_info *sysinfo) Modified: trunk/coreboot-v2/src/southbridge/amd/amd8111/amd8111.c =================================================================== --- trunk/coreboot-v2/src/southbridge/amd/amd8111/amd8111.c 2008-12-18 02:18:45 UTC (rev 3817) +++ trunk/coreboot-v2/src/southbridge/amd/amd8111/amd8111.c 2008-12-18 18:24:11 UTC (rev 3818) @@ -11,7 +11,7 @@ unsigned index; unsigned reg_old, reg; - /* See if we are on the behind the amd8111 pci bridge */ + /* See if we are on the bus behind the amd8111 pci bridge */ bus_dev = dev->bus->dev; if ((bus_dev->vendor == PCI_VENDOR_ID_AMD) && (bus_dev->device == PCI_DEVICE_ID_AMD_8111_PCI)) Modified: trunk/coreboot-v2/src/southbridge/amd/amd8111/amd8111_nic.c =================================================================== --- trunk/coreboot-v2/src/southbridge/amd/amd8111/amd8111_nic.c 2008-12-18 02:18:45 UTC (rev 3817) +++ trunk/coreboot-v2/src/southbridge/amd/amd8111/amd8111_nic.c 2008-12-18 18:24:11 UTC (rev 3818) @@ -7,6 +7,7 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include <arch/io.h> +#include <delay.h> #include "amd8111.h" -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
