Author: hailfinger Date: 2008-12-22 17:19:02 +0100 (Mon, 22 Dec 2008) New Revision: 3831
Modified: trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_aza.c trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_nic.c Log: Fix implicit udelay src/southbridge/nvidia/mcp55/mcp55_aza.c Fix imlicit mdelay in src/southbridge/nvidia/mcp55/mcp55_nic.c Signed-off-by: Carl-Daniel Hailfinger <[email protected]> Acked-by: Myles Watson <[email protected]> Modified: trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_aza.c =================================================================== --- trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_aza.c 2008-12-22 14:12:08 UTC (rev 3830) +++ trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_aza.c 2008-12-22 16:19:02 UTC (rev 3831) @@ -27,6 +27,7 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include <arch/io.h> +#include <delay.h> #include "mcp55.h" static int set_bits(uint8_t *port, uint32_t mask, uint32_t val) Modified: trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_nic.c =================================================================== --- trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_nic.c 2008-12-22 14:12:08 UTC (rev 3830) +++ trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_nic.c 2008-12-22 16:19:02 UTC (rev 3831) @@ -28,6 +28,7 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include <arch/io.h> +#include <delay.h> #include "mcp55.h" static int phy_read(uint8_t *base, unsigned phy_addr, unsigned phy_reg) -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
