Index: chipset_enable.c
===================================================================
--- chipset_enable.c	(revision 241)
+++ chipset_enable.c	(working copy)
@@ -681,8 +681,16 @@
 	flashbus = BUS_TYPE_SB600_SPI;
 
 	/* Enable SPI ROM in SB600 PM register. */
+	/* If we enable SPI ROM here, we have to disable it after we leave. 
+	 * But how can we know which ROM we are going to handle? So we have
+	 * to trade off. We only access LPC ROM if we boot via LPC ROM. And
+	 * only SPI ROM if we boot via SPI ROM. If you want to do it crossly,
+	 * you have to use the code below.
+	 */
+	/*
 	OUTB(0x8f, 0xcd6);
 	OUTB(0x0e, 0xcd7);
+	*/
 
 	return 0;
 }
Index: sb600spi.c
===================================================================
--- sb600spi.c	(revision 240)
+++ sb600spi.c	(working copy)
@@ -97,12 +97,18 @@
 		printf("reset\n");
 }
 
-void execute_command(void)
+int execute_command(void)
 {
+	int timeout = 1000;
+
 	sb600_spibar[2] |= 1;
 
-	while (sb600_spibar[2] & 1)
-		;
+	while ((sb600_spibar[2] & 1) && timeout)
+	{
+		/* myusec_delay(1000); */
+		timeout --;
+	}
+	return timeout ? 1 : 0;
 }
 
 int sb600_spi_command(unsigned int writecnt, unsigned int readcnt,
@@ -150,7 +156,8 @@
 	 */
 	reset_internal_fifo_pointer();
 
-	execute_command();
+	if (!execute_command())
+		return 1;
 
 	/*
 	 * After the command executed, we should find out the index of the