Author: hailfinger Date: 2008-12-24 18:58:44 +0100 (Wed, 24 Dec 2008) New Revision: 3843
Modified: trunk/coreboot-v2/src/mainboard/amd/dbm690t/fadt.c trunk/coreboot-v2/src/mainboard/amd/dbm690t/mainboard.c Log: Fix implicit declarations in the AMD DBM690T target by using the right header files. Signed-off-by: Carl-Daniel Hailfinger <[email protected]> Acked-by: Zheng Bao <[email protected]> Modified: trunk/coreboot-v2/src/mainboard/amd/dbm690t/fadt.c =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/dbm690t/fadt.c 2008-12-23 18:29:50 UTC (rev 3842) +++ trunk/coreboot-v2/src/mainboard/amd/dbm690t/fadt.c 2008-12-24 17:58:44 UTC (rev 3843) @@ -25,6 +25,8 @@ #include <console/console.h> #include <arch/acpi.h> #include <arch/io.h> +#include <device/device.h> +#include <../southbridge/amd/sb600/sb600.h> /*extern*/ u16 pm_base = 0x800; /* pm_base should be set in sb acpi */ Modified: trunk/coreboot-v2/src/mainboard/amd/dbm690t/mainboard.c =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/dbm690t/mainboard.c 2008-12-23 18:29:50 UTC (rev 3842) +++ trunk/coreboot-v2/src/mainboard/amd/dbm690t/mainboard.c 2008-12-24 17:58:44 UTC (rev 3843) @@ -25,6 +25,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <device/pci_def.h> +#include <../southbridge/amd/sb600/sb600.h> #include "chip.h" #define ADT7461_ADDRESS 0x4C @@ -34,6 +35,8 @@ extern int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address); extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, u8 val); +extern void lb_add_memory_range(struct lb_memory *mem, uint32_t type, + uint64_t start, uint64_t size); #define ADT7461_read_byte(address) \ do_smbus_read_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address) #define ARA_read_byte(address) \ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
