Hello! [email protected] wrote: > Hello for all! > > I'm trying to run coreboot on Asus P5G-MX(945) with Intel E8200
Hm, this board isn't explicitly supported at the moment, but it will be interesting to hear about your results are. How do you build coreboot for it? > so i ask administrator to add some code to svn Thanks for the contribution! In the future please send changes in unified diff format and with a Signed-off-by line as described on http://www.coreboot.org/Development_Guidelines Unified diffs are easy to work with and fairly easy to read. The easiest way to create a unified diff is to checkout from svn, make changes and then run svn diff in the coreboot-v2 checkout directory. I've attached a patch with your changes and my signoff, if you send an acked-by line I'll commit it. //Peter
coreboot v2: Add entries for Core2 Duo E8200 and some 945 FSB speeds. Signed-off-by: Peter Stuge <[email protected]> Index: src/northbridge/intel/i945/udelay.c =================================================================== --- src/northbridge/intel/i945/udelay.c (revision 3844) +++ src/northbridge/intel/i945/udelay.c (working copy) @@ -44,6 +44,18 @@ case 3: fsb = 667; break; + case 2: + fsb = 800; + break; + case 0: + fsb = 1067; + break; + case 4: + fsb = 1333; + break; + case 6: + fsb = 1600; + break; } msr = rdmsr(0x198); Index: src/cpu/intel/model_6fx/model_6fx_init.c =================================================================== --- src/cpu/intel/model_6fx/model_6fx_init.c (revision 3844) +++ src/cpu/intel/model_6fx/model_6fx_init.c (working copy) @@ -84,6 +84,7 @@ static struct cpu_device_id cpu_table[] = { { X86_VENDOR_INTEL, 0x06f0 }, /* Intel Core 2 Solo/Core Duo */ { X86_VENDOR_INTEL, 0x06f6 }, /* Intel Core 2 Solo/Core Duo */ + { X86_VENDOR_INTEL, 0x10676 }, /* Core2 Duo E8200 */ { 0, 0 }, };
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