On Fri, Jan 09, 2009 at 05:06:31PM +0200, Mart Raudsepp wrote: > > > -----Original Message----- > > > From: Ward Vandewege [mailto:[email protected]] > > > Sent: Friday, January 09, 2009 7:46 AM > > > To: Myles Watson > > > Cc: [email protected] > > > Subject: Re: [coreboot] [PATCH 1/2] cs5536: Add a NAND device and do > > > theIDE PCI header disabling on time. > > > > > > On Fri, Jan 09, 2009 at 07:33:37AM -0700, Myles Watson wrote: > > > > Maybe it would be better to have IDE/NAND selection depend on a > > > CMOS/NVRAM > > > > value, so that the same BIOS could be used with either choice. > > > > > > Will that work on boards without cmos battery (they exist - alix2c3 for > > > instance)? > > > > Maybe there are no boards with IDE and NAND support? If there are, are > > there any without a CMOS battery? How would the factory BIOS handle > > selection? > > There's a default CMOS content to fall back to, so during build > configuration you'd probably select the default and then in NVRAM be > able to switch that around. If there is no CMOS battery or it gets reset > (checksums don't validate or so) you just fall back to the fallback > iirc. > So without a CMOS battery you'd always have the default chosen at build > time, but you can switch by booting from the default and changing it > with nvramtool and soft restarting without removing power, or with a > currently non-existent setup menu payload in the future. > > Everything highly hypothetical and if there are no boards with both > supported based on this choice, then it's quite unlikely new ones will > appear either given the status of GeodeLX.
Agreed. Sounds good to me. Thanks, Ward. -- Ward Vandewege <[email protected]> Free Software Foundation - Senior Systems Administrator -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
