Author: mjones
Date: 2009-01-12 17:16:08 +0100 (Mon, 12 Jan 2009)
New Revision: 3856

Modified:
   trunk/coreboot-v2/src/mainboard/amd/dbm690t/cache_as_ram_auto.c
   trunk/coreboot-v2/src/mainboard/amd/pistachio/cache_as_ram_auto.c
   trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
Log:
Check to see if K8 processor is capable of changing FIDVID otherwise it will 
throw a GP# when reading FIDVID_STATUS

Signed-off-by: Dan Lykowski <[email protected]>
Acked-by: Zheng Bao <[email protected]>

Modified: trunk/coreboot-v2/src/mainboard/amd/dbm690t/cache_as_ram_auto.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/amd/dbm690t/cache_as_ram_auto.c     
2009-01-11 03:31:02 UTC (rev 3855)
+++ trunk/coreboot-v2/src/mainboard/amd/dbm690t/cache_as_ram_auto.c     
2009-01-12 16:16:08 UTC (rev 3856)
@@ -161,6 +161,7 @@
        int needs_reset = 0;
        u32 bsp_apicid = 0;
        msr_t msr;
+       struct cpuid_result cpuid1;
        struct sys_info *sysinfo = (struct sys_info *)(DCACHE_RAM_BASE + 
DCACHE_RAM_SIZE - DCACHE_RAM_GLOBAL_VAR_SIZE);
 
 
@@ -197,17 +198,27 @@
        rs690_early_setup();
        sb600_early_setup();
 
-       msr=rdmsr(0xc0010042);
-       printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
+       /* Check to see if processor is capable of changing FIDVID  */
+       /* otherwise it will throw a GP# when reading FIDVID_STATUS */
+       cpuid1 = cpuid(0x80000007);
+       if( (cpuid1.edx & 0x6) == 0x6 ) {
 
-       enable_fid_change();
-       enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
-       init_fidvid_bsp(bsp_apicid);
+               /* Read FIDVID_STATUS */
+               msr=rdmsr(0xc0010042);
+               printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, 
msr.lo);
 
-       /* show final fid and vid */
-       msr=rdmsr(0xc0010042);
-       printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
+               enable_fid_change();
+               enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
+               init_fidvid_bsp(bsp_apicid);
 
+               /* show final fid and vid */
+               msr=rdmsr(0xc0010042);
+               printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, 
msr.lo);
+
+       } else {
+               printk_debug("Changing FIDVID not supported\n");
+       }
+
        needs_reset = optimize_link_coherent_ht();
        needs_reset |= optimize_link_incoherent_ht(sysinfo);
        rs690_htinit();

Modified: trunk/coreboot-v2/src/mainboard/amd/pistachio/cache_as_ram_auto.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/amd/pistachio/cache_as_ram_auto.c   
2009-01-11 03:31:02 UTC (rev 3855)
+++ trunk/coreboot-v2/src/mainboard/amd/pistachio/cache_as_ram_auto.c   
2009-01-12 16:16:08 UTC (rev 3856)
@@ -155,6 +155,7 @@
        int needs_reset = 0;
        u32 bsp_apicid = 0;
        msr_t msr;
+       struct cpuid_result cpuid1;
        struct sys_info *sysinfo =
            (struct sys_info *)(DCACHE_RAM_BASE + DCACHE_RAM_SIZE -
                                DCACHE_RAM_GLOBAL_VAR_SIZE);
@@ -198,17 +199,27 @@
 
        post_code(0x04);
 
-       msr = rdmsr(0xc0010042);
-       printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
+       /* Check to see if processor is capable of changing FIDVID  */
+       /* otherwise it will throw a GP# when reading FIDVID_STATUS */
+       cpuid1 = cpuid(0x80000007);
+       if( (cpuid1.edx & 0x6) == 0x6 ) {
 
-       enable_fid_change();
-       enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
-       init_fidvid_bsp(bsp_apicid);
+               /* Read FIDVID_STATUS */
+               msr=rdmsr(0xc0010042);
+               printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, 
msr.lo);
 
-       // show final fid and vid
-       msr = rdmsr(0xc0010042);
-       printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
+               enable_fid_change();
+               enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
+               init_fidvid_bsp(bsp_apicid);
 
+               /* show final fid and vid */
+               msr=rdmsr(0xc0010042);
+               printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, 
msr.lo);
+
+       } else {
+               printk_debug("Changing FIDVID not supported\n");
+       }
+
        post_code(0x05);
 
        needs_reset = optimize_link_coherent_ht();

Modified: 
trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c   
2009-01-11 03:31:02 UTC (rev 3855)
+++ trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c   
2009-01-12 16:16:08 UTC (rev 3856)
@@ -259,6 +259,7 @@
 
         int needs_reset; int i;
         unsigned bsp_apicid = 0;
+       struct cpuid_result cpuid1;
 
         if (bist == 0) {
                bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
@@ -311,8 +312,13 @@
 #endif
 
 #if K8_SET_FIDVID == 1
+       /* Check to see if processor is capable of changing FIDVID  */
+       /* otherwise it will throw a GP# when reading FIDVID_STATUS */
+       cpuid1 = cpuid(0x80000007);
+       if( (cpuid1.edx & 0x6) == 0x6 ) {
 
         {
+               /* Read FIDVID_STATUS */
                 msr_t msr;
                 msr=rdmsr(0xc0010042);
                 print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi 
); print_debug_hex32(msr.lo); print_debug("\r\n");
@@ -332,6 +338,11 @@
                 print_debug("end   msr fid, vid "); print_debug_hex32( msr.hi 
); print_debug_hex32(msr.lo); print_debug("\r\n"); 
 
         }
+
+       } else {
+               print_debug("Changing FIDVID not supported\n");
+       }
+
 #endif
 
 #if 1


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