Author: stepan Date: 2009-01-20 22:32:37 +0100 (Tue, 20 Jan 2009) New Revision: 3879
Modified: trunk/coreboot-v2/src/cpu/intel/model_6fx/cache_as_ram.inc Log: Fix register typo for core 2 cpus (trivial) This bug was reported a long time ago by Thomas Jourdan. Thanks a lot Thomas. Signed-off-by: Stefan Reinauer <[email protected]> Acked-by: Stefan Reinauer <[email protected]> Modified: trunk/coreboot-v2/src/cpu/intel/model_6fx/cache_as_ram.inc =================================================================== --- trunk/coreboot-v2/src/cpu/intel/model_6fx/cache_as_ram.inc 2009-01-20 21:27:23 UTC (rev 3878) +++ trunk/coreboot-v2/src/cpu/intel/model_6fx/cache_as_ram.inc 2009-01-20 21:32:37 UTC (rev 3879) @@ -39,7 +39,7 @@ movl %eax, (%esi) /* Disable prefetchers */ - movl $0x01a0, %eax + movl $0x01a0, %ecx rdmsr orl $((1 << 9) | (1 << 19)), %eax orl $((1 << 5) | (1 << 7)), %edx -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
