Myles Watson wrote:
> That's actually what I would have expected. The IO address range is
> only 16 bits from 0-64K.
>
> I guess we'll have to get more information from qemu so we know which
> port address is being accessed when it dies.
>
> Myles
Hi Myles,
Here's my quick patch to qemu to dump out the address where the write is
failing:
Index: vl.c
===================================================================
--- vl.c (revision 6426)
+++ vl.c (working copy)
@@ -389,7 +389,7 @@
for(i = start; i < start + length; i += size) {
ioport_write_table[bsize][i] = func;
if (ioport_opaque[i] != NULL && ioport_opaque[i] != opaque)
- hw_error("register_ioport_write: invalid opaque");
+ hw_error("register_ioport_write: invalid opaque: (start
0x%x, length 0x%x, address 0x%x)", start, length, i);
ioport_opaque[i] = opaque;
}
return 0;
And here is the result output:
qemu: hardware error: register_ioport_write: invalid opaque: (start
0x510, length 0x1, address 0x510)
HTH,
Mark.
--
Mark Cave-Ayland
Sirius Corporation - The Open Source Experts
http://www.siriusit.co.uk
T: +44 870 608 0063
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