-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hello,
Following patch converts the run-time SSDT patching via update_ssdt funtion to new AML code generator. Compile-tested on all changed targets. I think it should work because it works for Asus M2V-MX SE. Signed-off-by: Rudolf Marek <[email protected]> Perhaps also some private SSDTs of each MB could be also somehow converted. Its quite complicated and I dont own any board to test, so lets just convert the generic stuff. Rudolf -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.9 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org iEYEARECAAYFAkmFypEACgkQ3J9wPJqZRNW9FACeJrmBKNYiAO/DTBMLaaVUfJut gIoAn1pfqPJbgHWliojTiuuG6bBgbPqh =9EI0 -----END PGP SIGNATURE-----
Index: coreboot-v2/src/mainboard/agami/aruma/acpi_tables.c
===================================================================
--- coreboot-v2.orig/src/mainboard/agami/aruma/acpi_tables.c 2009-02-01 11:35:21.618809143 +0100
+++ coreboot-v2/src/mainboard/agami/aruma/acpi_tables.c 2009-02-01 12:04:04.738807653 +0100
@@ -15,6 +15,7 @@
#include <device/pci_ids.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
+#include <../../../northbridge/amd/amdk8/amdk8_acpi.h>
#define DUMP_ACPI_TABLES 0
@@ -37,8 +38,6 @@
#define HC_POSSIBLE_NUM 8
extern unsigned char AmlCode[];
-extern unsigned char AmlCode_ssdt[];
-
#if ACPI_SSDTX_NUM >= 1
extern unsigned char AmlCode_ssdt2[];
extern unsigned char AmlCode_ssdt3[];
@@ -187,78 +186,11 @@
return current;
}
-//FIXME: next could be moved to northbridge/amd/amdk8/amdk8_acpi.c or cpu/amd/k8/k8_acpi.c begin
-static void int_to_stream(uint32_t val, uint8_t * dest)
-{
- int i;
- for (i = 0; i < 4; i++) {
- *(dest + i) = (val >> (8 * i)) & 0xff;
- }
+unsigned long acpi_fill_ssdt_generator(unsigned long current, char *oem_table_id) {
+ k8acpi_write_vars();
+ return (unsigned long) (acpigen_get_current());
}
-extern void get_bus_conf(void);
-
-static void update_ssdt(void *ssdt)
-{
- uint8_t *BUSN;
- uint8_t *MMIO;
- uint8_t *PCIO;
- uint8_t *SBLK;
- uint8_t *TOM1;
- uint8_t *HCLK;
- uint8_t *SBDN;
- uint8_t *HCDN;
- int i;
- device_t dev;
- uint32_t dword;
- msr_t msr;
-
- BUSN = ssdt + 0x3a; //+5 will be next BUSN
- MMIO = ssdt + 0x57; //+5 will be next MMIO
- PCIO = ssdt + 0xaf; //+5 will be next PCIO
- SBLK = ssdt + 0xdc; // one byte
- TOM1 = ssdt + 0xe3; //
- HCLK = ssdt + 0xfa; //+5 will be next HCLK
- SBDN = ssdt + 0xed; //
- HCDN = ssdt + 0x12a; //+5 will be next HCDN
-
- dev = dev_find_slot(0, PCI_DEVFN(0x18, 1));
-
- for (i = 0; i < 4; i++) {
- dword = pci_read_config32(dev, 0xe0 + i * 4);
- int_to_stream(dword, BUSN + i * 5);
- }
-
- for (i = 0; i < 0x10; i++) {
- dword = pci_read_config32(dev, 0x80 + i * 4);
- int_to_stream(dword, MMIO + i * 5);
- }
-
- for (i = 0; i < 0x08; i++) {
- dword = pci_read_config32(dev, 0xc0 + i * 4);
- int_to_stream(dword, PCIO + i * 5);
- }
-
- *SBLK = (uint8_t) (sblk);
-
- msr = rdmsr(TOP_MEM);
- int_to_stream(msr.lo, TOM1);
-
- for (i = 0; i < hc_possible_num; i++) {
- int_to_stream(pci1234[i], HCLK + i * 5);
- int_to_stream(hcdn[i], HCDN + i * 5);
- }
- for (i = hc_possible_num; i < HC_POSSIBLE_NUM; i++) { // in case we set array size to other than 8
- int_to_stream(0x00000000, HCLK + i * 5);
- int_to_stream(hcdn[i], HCDN + i * 5);
- }
-
- int_to_stream(sbdn, SBDN);
-
-}
-
-//end
-
unsigned long write_acpi_tables(unsigned long start)
{
unsigned long current;
@@ -322,16 +254,10 @@
/* SSDT */
printk_debug("ACPI: * SSDT\n");
- ssdt = (acpi_header_t *) current;
- current += ((acpi_header_t *) AmlCode_ssdt)->length;
- memcpy((void *) ssdt, (void *) AmlCode_ssdt,
- ((acpi_header_t *) AmlCode_ssdt)->length);
- //Here you need to set value in pci1234, sblk and sbdn in get_bus_conf.c
- update_ssdt((void *) ssdt);
- /* recalculate checksum */
- ssdt->checksum = 0;
- ssdt->checksum =
- acpi_checksum((unsigned char *) ssdt, ssdt->length);
+ ssdt = (acpi_header_t *)current;
+
+ acpi_create_ssdt_generator(ssdt, "DYNADATA");
+ current += ssdt->length;
acpi_add_table(rsdt, ssdt);
#if ACPI_SSDTX_NUM >= 1
Index: coreboot-v2/src/mainboard/amd/dbm690t/acpi_tables.c
===================================================================
--- coreboot-v2.orig/src/mainboard/amd/dbm690t/acpi_tables.c 2009-02-01 11:41:31.403809957 +0100
+++ coreboot-v2/src/mainboard/amd/dbm690t/acpi_tables.c 2009-02-01 12:03:58.154807563 +0100
@@ -25,7 +25,7 @@
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/amd/amdk8_sysconf.h>
-
+#include <../../../northbridge/amd/amdk8/amdk8_acpi.h>
#include <arch/cpu.h>
#define DUMP_ACPI_TABLES 0
@@ -99,8 +99,6 @@
extern void get_bus_conf(void);
-extern void update_ssdt(void *ssdt);
-
void update_ssdtx(void *ssdtx, int i)
{
uint8_t *PCI;
@@ -583,6 +581,11 @@
}
+unsigned long acpi_fill_ssdt_generator(unsigned long current, char *oem_table_id) {
+ k8acpi_write_vars();
+ return (unsigned long) (acpigen_get_current());
+}
+
unsigned long write_acpi_tables(unsigned long start)
{
unsigned long current;
@@ -649,15 +652,10 @@
/* SSDT */
printk_debug("ACPI: * SSDT\n");
- ssdt = (acpi_header_t *) current;
- current += ((acpi_header_t *) AmlCode_ssdt)->length;
- memcpy((void *)ssdt, (void *)AmlCode_ssdt,
- ((acpi_header_t *) AmlCode_ssdt)->length);
- /* Here you need to set value in pci1234, sblk and sbdn in get_bus_conf.c */
- update_ssdt((void *)ssdt);
- /* recalculate checksum */
- ssdt->checksum = 0;
- ssdt->checksum = acpi_checksum((u8 *)ssdt, ssdt->length);
+ ssdt = (acpi_header_t *)current;
+
+ acpi_create_ssdt_generator(ssdt, "DYNADATA");
+ current += ssdt->length;
acpi_add_table(rsdt, ssdt);
#if ACPI_SSDTX_NUM >= 1
Index: coreboot-v2/src/mainboard/amd/serengeti_cheetah/acpi_tables.c
===================================================================
--- coreboot-v2.orig/src/mainboard/amd/serengeti_cheetah/acpi_tables.c 2009-02-01 11:40:23.711810079 +0100
+++ coreboot-v2/src/mainboard/amd/serengeti_cheetah/acpi_tables.c 2009-02-01 12:03:54.710807709 +0100
@@ -16,6 +16,7 @@
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/amd/amdk8_sysconf.h>
+#include <../../../northbridge/amd/amdk8/amdk8_acpi.h>
#include "mb_sysconf.h"
@@ -38,8 +39,6 @@
#endif
extern unsigned char AmlCode[];
-extern unsigned char AmlCode_ssdt[];
-
#if ACPI_SSDTX_NUM >= 1
extern unsigned char AmlCode_ssdt2[];
extern unsigned char AmlCode_ssdt3[];
@@ -157,8 +156,6 @@
extern void get_bus_conf(void);
-extern void update_ssdt(void *ssdt);
-
void update_ssdtx(void *ssdtx, int i)
{
uint8_t *PCI;
@@ -182,6 +179,11 @@
}
+unsigned long acpi_fill_ssdt_generator(unsigned long current, char *oem_table_id) {
+ k8acpi_write_vars();
+ return (unsigned long) (acpigen_get_current());
+}
+
unsigned long write_acpi_tables(unsigned long start)
{
unsigned long current;
@@ -256,14 +258,10 @@
/* SSDT */
printk_debug("ACPI: * SSDT\n");
ssdt = (acpi_header_t *)current;
- current += ((acpi_header_t *)AmlCode_ssdt)->length;
- memcpy((void *)ssdt, (void *)AmlCode_ssdt, ((acpi_header_t *)AmlCode_ssdt)->length);
- //Here you need to set value in pci1234, sblk and sbdn in get_bus_conf.c
- update_ssdt((void*)ssdt);
- /* recalculate checksum */
- ssdt->checksum = 0;
- ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
- acpi_add_table(rsdt,ssdt);
+
+ acpi_create_ssdt_generator(ssdt, "DYNADATA");
+ current += ssdt->length;
+ acpi_add_table(rsdt, ssdt);
#if ACPI_SSDTX_NUM >= 1
Index: coreboot-v2/src/mainboard/iwill/dk8_htx/acpi_tables.c
===================================================================
--- coreboot-v2.orig/src/mainboard/iwill/dk8_htx/acpi_tables.c 2009-02-01 11:39:09.646809351 +0100
+++ coreboot-v2/src/mainboard/iwill/dk8_htx/acpi_tables.c 2009-02-01 12:03:51.610806995 +0100
@@ -16,6 +16,7 @@
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/amd/amdk8_sysconf.h>
+#include <../../../northbridge/amd/amdk8/amdk8_acpi.h>
#include "mb_sysconf.h"
@@ -38,7 +39,6 @@
#endif
extern unsigned char AmlCode[];
-extern unsigned char AmlCode_ssdt[];
#if ACPI_SSDTX_NUM >= 1
extern unsigned char AmlCode_ssdt2[];
@@ -159,8 +159,6 @@
extern void get_bus_conf(void);
-extern void update_ssdt(void *ssdt);
-
void update_ssdtx(void *ssdtx, int i)
{
uint8_t *PCI;
@@ -184,6 +182,11 @@
}
+unsigned long acpi_fill_ssdt_generator(unsigned long current, char *oem_table_id) {
+ k8acpi_write_vars();
+ return (unsigned long) (acpigen_get_current());
+}
+
unsigned long write_acpi_tables(unsigned long start)
{
unsigned long current;
@@ -258,14 +261,10 @@
/* SSDT */
printk_debug("ACPI: * SSDT\n");
ssdt = (acpi_header_t *)current;
- current += ((acpi_header_t *)AmlCode_ssdt)->length;
- memcpy((void *)ssdt, (void *)AmlCode_ssdt, ((acpi_header_t *)AmlCode_ssdt)->length);
- //Here you need to set value in pci1234, sblk and sbdn in get_bus_conf.c
- update_ssdt((void*)ssdt);
- /* recalculate checksum */
- ssdt->checksum = 0;
- ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
- acpi_add_table(rsdt,ssdt);
+
+ acpi_create_ssdt_generator(ssdt, "DYNADATA");
+ current += ssdt->length;
+ acpi_add_table(rsdt, ssdt);
#if ACPI_SSDTX_NUM >= 1
Index: coreboot-v2/src/mainboard/amd/pistachio/acpi_tables.c
===================================================================
--- coreboot-v2.orig/src/mainboard/amd/pistachio/acpi_tables.c 2009-02-01 11:44:40.630810112 +0100
+++ coreboot-v2/src/mainboard/amd/pistachio/acpi_tables.c 2009-02-01 12:04:01.026808289 +0100
@@ -25,7 +25,7 @@
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/amd/amdk8_sysconf.h>
-
+#include <../../../northbridge/amd/amdk8/amdk8_acpi.h>
#include <arch/cpu.h>
#define DUMP_ACPI_TABLES 0
@@ -55,7 +55,6 @@
#endif
extern u8 AmlCode[];
-extern u8 AmlCode_ssdt[];
#if ACPI_SSDTX_NUM >= 1
extern u8 AmlCode_ssdt2[];
@@ -99,8 +98,6 @@
extern void get_bus_conf(void);
-extern void update_ssdt(void *ssdt);
-
void update_ssdtx(void *ssdtx, int i)
{
uint8_t *PCI;
@@ -591,6 +588,11 @@
}
+unsigned long acpi_fill_ssdt_generator(unsigned long current, char *oem_table_id) {
+ k8acpi_write_vars();
+ return (unsigned long) (acpigen_get_current());
+}
+
unsigned long write_acpi_tables(unsigned long start)
{
unsigned long current;
@@ -657,15 +659,10 @@
/* SSDT */
printk_debug("ACPI: * SSDT\n");
- ssdt = (acpi_header_t *) current;
- current += ((acpi_header_t *) AmlCode_ssdt)->length;
- memcpy((void *)ssdt, (void *)AmlCode_ssdt,
- ((acpi_header_t *) AmlCode_ssdt)->length);
- /* Here you need to set value in pci1234, sblk and sbdn in get_bus_conf.c */
- update_ssdt((void *)ssdt);
- /* recalculate checksum */
- ssdt->checksum = 0;
- ssdt->checksum = acpi_checksum((u8 *)ssdt, ssdt->length);
+ ssdt = (acpi_header_t *)current;
+
+ acpi_create_ssdt_generator(ssdt, "DYNADATA");
+ current += ssdt->length;
acpi_add_table(rsdt, ssdt);
#if ACPI_SSDTX_NUM >= 1
Index: coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.c
===================================================================
--- coreboot-v2.orig/src/northbridge/amd/amdk8/amdk8_acpi.c 2009-02-01 12:05:06.350809357 +0100
+++ coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.c 2009-02-01 12:05:34.035807485 +0100
@@ -249,16 +249,6 @@
//end
-
-// moved from mb acpi_tables.c
-static void int_to_stream(uint32_t val, uint8_t *dest)
-{
- int i;
- for(i=0;i<4;i++) {
- *(dest+i) = (val >> (8*i)) & 0xff;
- }
-}
-
static int k8acpi_write_HT(void) {
device_t dev;
uint32_t dword;
@@ -334,72 +324,3 @@
return lens;
}
-// used by acpi_tables.h
-
-void update_ssdt(void *ssdt)
-{
- uint8_t *BUSN;
- uint8_t *MMIO;
- uint8_t *PCIO;
- uint8_t *SBLK;
- uint8_t *TOM1;
- uint8_t *SBDN;
- uint8_t *HCLK;
- uint8_t *HCDN;
- uint8_t *CBST;
-
- int i;
- device_t dev;
- uint32_t dword;
- msr_t msr;
-
- BUSN = ssdt+0x3a; //+5 will be next BUSN
- MMIO = ssdt+0x57; //+5 will be next MMIO
- PCIO = ssdt+0xaf; //+5 will be next PCIO
- SBLK = ssdt+0xdc; // one byte
- TOM1 = ssdt+0xe3; //
- SBDN = ssdt+0xed; //
- HCLK = ssdt+0xfa; //+5 will be next HCLK
- HCDN = ssdt+0x12a; //+5 will be next HCDN
- CBST = ssdt+0x157; //
-
- dev = dev_find_slot(0, PCI_DEVFN(0x18, 1));
- for(i=0;i<4;i++) {
- dword = pci_read_config32(dev, 0xe0+i*4);
- int_to_stream(dword, BUSN+i*5);
- }
- for(i=0;i<0x10;i++) {
- dword = pci_read_config32(dev, 0x80+i*4);
- int_to_stream(dword, MMIO+i*5);
- }
- for(i=0;i<0x08;i++) {
- dword = pci_read_config32(dev, 0xc0+i*4);
- int_to_stream(dword, PCIO+i*5);
- }
-
- *SBLK = (uint8_t)(sysconf.sblk);
-
- msr = rdmsr(TOP_MEM);
- int_to_stream(msr.lo, TOM1);
-
- for(i=0;i<sysconf.hc_possible_num;i++) {
- int_to_stream(sysconf.pci1234[i], HCLK + i*5);
- int_to_stream(sysconf.hcdn[i], HCDN + i*5);
- }
- for(i=sysconf.hc_possible_num; i<HC_POSSIBLE_NUM; i++) { // in case we set array size to other than 8
- int_to_stream(0x00000000, HCLK + i*5);
- int_to_stream(0x20202020, HCDN + i*5);
- }
-
- int_to_stream(sysconf.sbdn, SBDN);
-
- if((sysconf.pci1234[0] >> 12) & 0xff) { //sb chain on other than bus 0
- *CBST = (uint8_t) (0x0f);
- }
- else {
- *CBST = (uint8_t) (0x00);
- }
-
-}
-
-//end
Index: coreboot-v2/src/northbridge/amd/amdk8/ssdt.dsl
===================================================================
--- coreboot-v2.orig/src/northbridge/amd/amdk8/ssdt.dsl 2009-02-01 16:53:23.526807465 +0100
+++ /dev/null 1970-01-01 00:00:00.000000000 +0000
@@ -1,78 +0,0 @@
-/*
- * Copyright 2005 AMD
- */
-DefinitionBlock ("SSDT.aml", "SSDT", 1, "AMD-K8", "AMD-ACPI", 100925440)
-{
- /*
- * These objects were referenced but not defined in this table
- */
- External (\_SB_.PCI0, DeviceObj)
-
- Scope (\_SB.PCI0)
- {
- Name (BUSN, Package (0x04)
- {
- 0x11111111,
- 0x22222222,
- 0x33333333,
- 0x44444444
- })
- Name (MMIO, Package (0x10)
- {
- 0x11111111,
- 0x22222222,
- 0x33333333,
- 0x44444444,
- 0x55555555,
- 0x66666666,
- 0x77777777,
- 0x88888888,
- 0x99999999,
- 0xaaaaaaaa,
- 0xbbbbbbbb,
- 0xcccccccc,
- 0xdddddddd,
- 0xeeeeeeee,
- 0x11111111,
- 0x22222222
- })
- Name (PCIO, Package (0x08)
- {
- 0x77777777,
- 0x88888888,
- 0x99999999,
- 0xaaaaaaaa,
- 0xbbbbbbbb,
- 0xcccccccc,
- 0xdddddddd,
- 0xeeeeeeee
- })
- Name (SBLK, 0x11)
- Name (TOM1, 0xaaaaaaaa)
- Name (SBDN, 0xbbbbbbbb)
- Name (HCLK, Package (0x08)
- {
- 0x11111111,
- 0x22222222,
- 0x33333333,
- 0x44444444,
- 0x55555555,
- 0x66666666,
- 0x77777777,
- 0x88888888
- })
- Name (HCDN, Package (0x08)
- {
- 0x11111111,
- 0x22222222,
- 0x33333333,
- 0x44444444,
- 0x55555555,
- 0x66666666,
- 0x77777777,
- 0x88888888
- })
- Name (CBST, 0x88)
- }
-}
-
Index: coreboot-v2/src/northbridge/amd/amdk8/Config.lb
===================================================================
--- coreboot-v2.orig/src/northbridge/amd/amdk8/Config.lb 2009-02-01 16:54:00.967807492 +0100
+++ coreboot-v2/src/northbridge/amd/amdk8/Config.lb 2009-02-01 16:54:08.931807363 +0100
@@ -19,13 +19,6 @@
if HAVE_ACPI_TABLES
object amdk8_acpi.o
- makerule ssdt.c
- depends "$(TOP)/src/northbridge/amd/amdk8/ssdt.dsl"
- action "iasl -p $(PWD)/ssdt -tc $(TOP)/src/northbridge/amd/amdk8/ssdt.dsl"
- action "perl -pi -e 's/AmlCode/AmlCode_ssdt/g' ssdt.hex"
- action "mv ssdt.hex ssdt.c"
- end
- object ./ssdt.o
end
cleanup_ssdt_on_mb.patch.sig
Description: Binary data
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