On Wed, Feb 11, 2009 at 10:01 AM, Rudolf Marek <[email protected]> wrote:
> Hi,
> http://www.coreboot.org/ACPI_in_coreboot
>
>
> Did you checked link above?
>
>> - I can't figure out the correspondence between pnp devices in
>> /proc/ioports and coreboot. The ACPI device is missing, and I'm not
>> sure how to add it. That causes problems when it tries to read the
>> timer specified in fadt.c. If I remove the timer reference Linux
>> complains but continues until it breaks based on interrupt routing.
>
> You dont need ACPI device...
I wasn't clear. I needed the address for the fadt pm_base. Since
coreboot allocates it at 0x1000 and the factory BIOS allocates it at
0x8000 I was having a hard time finding it.
>
>> - The disassembled dsdt from the board doesn't match the way coreboot
>> configures the board, so I was trying to add my own based on another
>> board...
>>
>> - I don't see the relationship between /proc/interrupts and how to
>> generate the _PRT in the dsdt
>
> You need to check the MPTable/PIRQ the _PRT is just another way how to
> express the tables. Check the link above.
>
>> - I just want the bare minimum for now. If there's something I should
>> disable to make it simpler, I'm happy to do that.
>
> Well, for Linux you can remove:
>
>
> + Method (_CRS, 0, NotSerialized)
> + {
> + Name (BUF0, ResourceTemplate ()
> + {
> + IO (Decode16,
> + 0x0CF8, // Address Range Minimum
> + 0x0CF8, // Address Range Maximum
> + 0x01, // Address Alignment
> + 0x08, // Address Length
> + )
> + WordIO (ResourceProducer, MinFixed,
> MaxFixed, PosDecode, EntireRange,
> + 0x0000, // Address Space Granularity
> + 0x0000, // Address Range Minimum
> + 0x0CF7, // Address Range Maximum
> + 0x0000, // Address Translation Offset
> + 0x0CF8, // Address Length
> + ,, , TypeStatic)
> + })
> + /* Methods bellow use SSDT to get actual
> MMIO regs
> + * The IO ports are from 0xd00, optionally
> an VGA,
> + * otherwise the info from MMIO is used.
> + */
> + Concatenate (\_SB.GMEM (0x00,
> \_SB.PCI0.SBLK), BUF0, Local1)
> + Concatenate (\_SB.GIOR (0x00,
> \_SB.PCI0.SBLK), Local1, Local2)
> + Concatenate (\_SB.GWBN (0x00,
> \_SB.PCI0.SBLK), Local2, Local3)
> + Return (Local3)
> + }
>
> As well the Include ("amdk8_util.asl")
It doesn't help to take this out, except that it removes this error:
ACPI Error (psargs-0358): [SBLK] Namespace lookup failure, AE_NOT_FOUND
ACPI Error (psparse-0530): Method parse/execution failed
[\_SB_.PCI0._CRS] (Node ffff88013fc01720), AE_NOT_FOUND
Do you get that error too, or was I supposed to change some value to
make it work?
>
>
> From mptable:
>
> 165 // Onboard ck804 SATA 0
> 166 smp_write_intsrc(mc, mp_INT,
> MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn +7)<<2)|0,
> apicid_ck804, 0x17); // 23
> 167
> 168 // Onboard ck804 SATA 1
> 169 smp_write_intsrc(mc, mp_INT,
> MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn +8)<<2)|0,
> apicid_ck804, 0x16); // 22
> 170
>
>
> The sbdn is static? Lets assume SBDN is 0 for now.
It is 0.
> for SATA 0 the _PR looks like this:
>
> Package (0x04) { 0x0007FFFF, 0x00, 0x00, 0x17 }, //sata at 7.0 goes to IRQ
> 23
Thanks, that helped a lot. I'm still not booting though. I get this
error in the boot log, then the hard drives stop working. The
interrupts shouldn't be at fault, because they match the mptable.
..TIMER: vector=0x30 apic1=0 pin1=0 apic2=-1 pin2=-1
..MP-BIOS bug: 8254 timer not connected to IO-APIC
...trying to set up timer (IRQ0) through the 8259A ...
..... (found apic 0 pin 0) ...
....... failed.
...trying to set up timer as Virtual Wire IRQ...
..... failed.
...trying to set up timer as ExtINT IRQ...
..... works.
Here's the first line from the acpi=off boot:
..TIMER: vector=0x30 apic1=0 pin1=0 apic2=0 pin2=0
Unfortunately I can't see where it gets set to correct it.
I'm attaching my latest dsdt file. Thanks for guiding me through this!
Myles
/*
* This file is part of the coreboot project.
*
* (C) Copyright 2004 Nick Barker <[email protected]>
* (C) Copyright 2007, 2008 Rudolf Marek <[email protected]>
*
* ISA portions taken from QEMU acpi-dsdt.dsl.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License v2 as published by
* the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
DefinitionBlock ("DSDT.aml", "DSDT", 1, "C-BOOT", "CB-DSDT", 1)
{
//Include ("amdk8_util.asl")
/* Define the main processor.*/
Scope (\_PR)
{
Processor (\_PR.CPU0, 0x00, 0x000000, 0x00) {}
Processor (\_PR.CPU1, 0x01, 0x000000, 0x00) {}
Processor (\_PR.CPU2, 0x02, 0x000000, 0x00) {}
Processor (\_PR.CPU3, 0x03, 0x000000, 0x00) {}
}
/* For now only define 2 power states:
* - S0 which is fully on
* - S5 which is soft off
* Any others would involve declaring the wake up methods.
*/
Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 })
Name (\_S5, Package () { 0x02, 0x02, 0x00, 0x00 })
/* Root of the bus hierarchy */
Scope (\_SB)
{
/* Top PCI device (CK804) */
Device (PCI0)
{
Name (_HID, EisaId ("PNP0A03"))
Name (_ADR, 0x00)
Name (_UID, 0x00)
Name (_BBN, 0x00)
External (BUSN)
External (MMIO)
External (PCIO)
External (SBLK)
External (TOM1)
External (HCLK)
External (SBDN)
External (HCDN)
/*
Method (_CRS, 0, NotSerialized)
{
Name (BUF0, ResourceTemplate ()
{
IO (Decode16,
0x0CF8, // Address Range Minimum
0x0CF8, // Address Range Maximum
0x01, // Address Alignment
0x08, // Address Length
)
WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
0x0000, // Address Space Granularity
0x0000, // Address Range Minimum
0x0CF7, // Address Range Maximum
0x0000, // Address Translation Offset
0x0CF8, // Address Length
,, , TypeStatic)
})
Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1)
Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2)
Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3)
Return (Local3)
}
*/
/* PCI Routing Table */
Name (_PRT, Package () {
/* Since source is 0, index is IRQ. */
/* in ABCD, A=0, B=1, C=2, D=3 */
/* SlotFFFF, ABCD, source, index */
Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x0A }, /* 0x1 SMBUS IRQ 10 */
Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x15 }, /* 0x2 USB IRQ 21 */
Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x14 }, /* 0x2 USB IRQ 20 */
Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x14 }, /* 0x2 AUDIO IRQ 20 */
Package (0x04) { 0x0007FFFF, 0x00, 0x00, 0x17 }, /* 0x7 SATA 0 IRQ 23 */
Package (0x04) { 0x0008FFFF, 0x00, 0x00, 0x16 }, /* 0x8 SATA 1 IRQ 22 */
Package (0x04) { 0x000aFFFF, 0x00, 0x00, 0x15 }, /* 0xa LAN IRQ 21 */
Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x1B }, /* PCIE16 bridge IRQ27 */
})
Device (PCIl)
{
Name (_ADR, 0x00090000)
Name (_UID, 0x00)
Name (_BBN, 0x01)
Name (_PRT, Package () {
Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x10 }, /* 1:04 PCI 32 IRQ16-IRQ19 */
Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x11 },
Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x12 },
Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x13 },
Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x13 }, /* 1:05 IEEE-1394 IRQ 19 */
})
}
/* 2:00 PCIe x16 SB IRQ 18 */
Device (Pe16)
{
Name (_ADR, 0x000e0000)
Name (_UID, 0x00)
Name (_BBN, 0x02)
Name (_PRT, Package () {
Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x12 }, /* PCIE IRQ16-IRQ19 */
Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x13 },
Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x10 },
Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x11 },
})
}
Device (ISA) {
Name (_ADR, 0x00110000)
/* PS/2 keyboard (seems to be important for WinXP install) */
Device (KBD)
{
Name (_HID, EisaId ("PNP0303"))
Method (_STA, 0, NotSerialized)
{
Return (0x0f)
}
Method (_CRS, 0, NotSerialized)
{
Name (TMP, ResourceTemplate () {
IO (Decode16, 0x0060, 0x0060, 0x01, 0x01)
IO (Decode16, 0x0064, 0x0064, 0x01, 0x01)
IRQNoFlags () {1}
})
Return (TMP)
}
}
/* PS/2 mouse */
Device (MOU)
{
Name (_HID, EisaId ("PNP0F13"))
Method (_STA, 0, NotSerialized)
{
Return (0x0f)
}
Method (_CRS, 0, NotSerialized)
{
Name (TMP, ResourceTemplate () {
IRQNoFlags () {12}
})
Return (TMP)
}
}
}
}
/* CK804 2050 */
Device (PCI1)
{
Name (_HID, EisaId ("PNP0A05"))
Name (_ADR, 0x00)
Name (_UID, 0x00)
Name (_BBN, 0x80)
External (BUSN)
External (MMIO)
External (PCIO)
External (SBLK)
External (TOM1)
External (HCLK)
External (SBDN)
External (HCDN)
/* PCI Routing Table for this root bus */
Name (_PRT, Package () {
/* Since source is 0, index is IRQ. */
/* in ABCD, A=0, B=1, C=2, D=3 */
/* SlotFFFF, ABCD, source, index */
Package (0x04) { 0x000aFFFF, 0x00, 0x00, 0x35 }, /* 0xa LAN IRQ 53 */
})
/* PCIe x16 SB2 IRQ 18 */
Device (Pe16)
{
Name (_ADR, 0x000e0000)
Name (_UID, 0x00)
Name (_BBN, 0x81)
Name (_PRT, Package () {
Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x32 }, /* PCIE IRQ48-IRQ51 */
Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x33 },
Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x30 },
Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x31 },
})
}
}
/* AMD 8131 PCI-X tunnel */
Device (PCI2)
{
Name (_HID, EisaId ("PNP0A06"))
Name (_ADR, 0x00)
Name (_UID, 0x00)
Name (_BBN, 0x40)
External (BUSN)
External (MMIO)
External (PCIO)
External (SBLK)
External (TOM1)
External (HCLK)
External (SBDN)
External (HCDN)
/* I think this is Channel A PCIX 133 */
Device (PCX6)
{
Name (_ADR, 0x00000000)
Name (_UID, 0x00)
Name (_BBN, 0x41)
Name (_PRT, Package () {
Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x18 }, /* PCIE IRQ24-IRQ27 */
Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x19 },
Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x1a },
Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x1b },
})
}
Device (PCX4)
{
Name (_ADR, 0x00010000)
Name (_UID, 0x00)
Name (_BBN, 0x42)
Name (_PRT, Package () {
Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x1c }, /* PCIE IRQ28-IRQ31 */
Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x1d },
Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x1e },
Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x1f },
})
}
Device (PCX5)
{
Name (_ADR, 0x00010000)
Name (_UID, 0x00)
Name (_BBN, 0x42)
Name (_PRT, Package () {
Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x1d }, /* PCIE IRQ28-IRQ31 shifted 1 */
Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x1e },
Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x1f },
Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x1c },
})
}
}
}
}
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