On 20.02.2009 18:53, Peter Stuge wrote: > Ward Vandewege wrote: > >>> It's not a very generic fix. It's basically a compile time decision >>> whether to use SPI or LPC on SB600 chipsets. >>> >> I understand. It works around the hang for me. >> > > But it breaks all SB600 boards with SPI flash. >
I thought the patch just didn't enable SPI unconditionally any more. Do you have reports of breakage with that patch on SB600 SPI boards? Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
