Author: rminnich Date: 2009-02-24 04:38:37 +0100 (Tue, 24 Feb 2009) New Revision: 1139
Modified: coreboot-v3/arch/x86/intel/core2/init_cpus.c coreboot-v3/arch/x86/secondary.S Log: Again, this probably won't work but I want to make the code visible so people can suggest what's wrong. Signed-off-by: Ronald G. Minnich <[email protected]> Acked-by: Ronald G. Minnich <[email protected]> Modified: coreboot-v3/arch/x86/intel/core2/init_cpus.c =================================================================== --- coreboot-v3/arch/x86/intel/core2/init_cpus.c 2009-02-23 18:42:44 UTC (rev 1138) +++ coreboot-v3/arch/x86/intel/core2/init_cpus.c 2009-02-24 03:38:37 UTC (rev 1139) @@ -287,7 +287,7 @@ /* Boot on the stack */ /* Kick the second */ - printk(BIOS_SPEW, "Send start_eip %#lx(%#lx)\n", start_eip, start_eip>>12); + printk(BIOS_SPEW, "Send start_eip %#lx(%#lx) sb[-1] %p\n", start_eip, start_eip>>12, (void *) secondary_base[-1]); lapic_write_around(LAPIC_ICR, LAPIC_DM_STARTUP | (start_eip >> 12)); @@ -321,7 +321,7 @@ if (send_status || accept_status) break; } - printk(BIOS_SPEW, "After Startup.\n"); + printk(BIOS_SPEW, "After Startup.sb[-1] %p\n", (void *) secondary_base[-1]); if (send_status) printk(BIOS_WARNING, "APIC never delivered???\n"); if (accept_status) Modified: coreboot-v3/arch/x86/secondary.S =================================================================== --- coreboot-v3/arch/x86/secondary.S 2009-02-23 18:42:44 UTC (rev 1138) +++ coreboot-v3/arch/x86/secondary.S 2009-02-24 03:38:37 UTC (rev 1139) @@ -24,12 +24,13 @@ .text .globl _secondary_start, _secondary_start_end _secondary_start: +1: .code16 .balign 4096 cli + movl $1b, %ebx xorl %eax, %eax movl %eax, %cr3 /* Invalidate TLB*/ - /* On hyper threaded cpus, invalidating the cache here is * very very bad. Don't. */ @@ -60,8 +61,8 @@ lidt idtarg /* Set the stack pointer */ - movl $_secondary_start-4,%eax - movl 0x0(%eax),%esp + movl -4(%ebx),%esp + movl $0, -4(%ebx) call secondary_cpu_init 1: hlt -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
