On 02.03.2009 16:33, ron minnich wrote: > On Mon, Mar 2, 2009 at 7:30 AM, Carl-Daniel Hailfinger > <[email protected]> wrote: > > >> AFAIK it has been the case at least since AMD published their 690G/SB600 >> port, maybe even before that. For a fun time, grep over the tree for >> pci_cf8_conf1 and you'll see it is not constrained to mainboard code. >> > > > ok, has anyone checked to see if it's the code that determines type > 1/type 2 access going wrong somehow? >
Maybe. pci_set_method() is not called on any K8 platform. AFAICS type 1 is hardcoded there, so pci_set_method should not be necessary in theory. I don't know whether setting the access method happens early enough for the mainboard code. > If so, there's an easy fix :-) > Hopefully. Once Ward boots tomorrow with my debug patch, we'll know where exactly it hangs and probably also why. Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
