Author: phueper Date: 2009-03-05 22:28:56 +0100 (Thu, 05 Mar 2009) New Revision: 1144
Modified: coreboot-v3/util/x86emu/yabel/io.c Log: YABEL: fix 32bit cf8/cfc PCI Config accesses Signed-off-by: Pattrick Hueper <[email protected]> Acked-by: Carl-Daniel Hailfinger <[email protected]> Modified: coreboot-v3/util/x86emu/yabel/io.c =================================================================== --- coreboot-v3/util/x86emu/yabel/io.c 2009-03-05 05:48:43 UTC (rev 1143) +++ coreboot-v3/util/x86emu/yabel/io.c 2009-03-05 21:28:56 UTC (rev 1144) @@ -348,7 +348,7 @@ pci_cfg_read(X86EMU_pioAddr addr, u8 size) { u32 rval = 0xFFFFFFFF; - if ((addr >= 0xCFC) && ((addr + size) <= 0xCFF)) { + if ((addr >= 0xCFC) && ((addr + size) <= 0xD00)) { // PCI Configuration Mechanism 1 step 1 // write to 0xCF8, sets bus, device, function and Config Space offset // later read from 0xCFC-0xCFF returns the value... @@ -404,7 +404,7 @@ void pci_cfg_write(X86EMU_pioAddr addr, u32 val, u8 size) { - if ((addr >= 0xCFC) && ((addr + size) <= 0xCFF)) { + if ((addr >= 0xCFC) && ((addr + size) <= 0xD00)) { // PCI Configuration Mechanism 1 step 1 // write to 0xCF8, sets bus, device, function and Config Space offset // later write to 0xCFC-0xCFF sets the value... -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
