See patch
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coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br.
Tel.: +49 761 7668825 • Fax: +49 761 7664613
Email: [email protected] • http://www.coresystems.de/
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Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866
Add support for the LPC47M182 to superiotool
Signed-off-by: Stefan Reinauer <[email protected]>
Index: util/superiotool/superiotool.c
===================================================================
--- util/superiotool/superiotool.c (.../branches/upstream/coreboot-v2)
+++ util/superiotool/superiotool.c (.../trunk/coreboot-v2)
@@ -157,6 +157,20 @@
}
}
+void dump_io(uint16_t iobase, uint16_t length)
+{
+ uint16_t i;
+
+ printf("Dumping %d IO mapped registers at base 0x%04x:\n",
+ length, iobase);
+ for (i=0; i<length; i++)
+ printf ("%02x ", i);
+ printf("\n");
+ for (i=0; i<length; i++)
+ printf ("%02x ", INB(iobase +i));
+ printf("\n");
+}
+
void probing_for(const char *vendor, const char *info, uint16_t port)
{
if (!verbose)
Index: util/superiotool/smsc.c
===================================================================
--- util/superiotool/smsc.c (.../branches/upstream/coreboot-v2)
+++ util/superiotool/smsc.c (.../trunk/coreboot-v2)
@@ -437,7 +437,41 @@
{EOT}}},
{0x6f, "LPC47B397", {
{EOT}}},
- {0x74, "LPC47M182", {
+ {0x74, "LPC47M182", { /* Only for LD_NUM = 0 */
+ {NOLDN, NULL,
+ {0x02,0x03,0x07,0x20,0x21,0x22,0x23,0x24,0x26,0x27,
+ 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
+ {0x00,RSVD,0x00,0x74,RSVD,0x00,RSVD,0x44,MISC,0x00,
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
+ {0x0, "Floppy",
+ {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
+ 0xf8,EOT},
+ {0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,
+ 0x24,EOT}},
+ {0x1, "Parallel port",
+ {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf8,EOT},
+ {0x00,0x00,0x00,0x00,0x04,0x3c,0x00,0x08,EOT}},
+ {0x2, "COM2",
+ {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
+ {0x00,0x00,0x00,0x00,0x00,0x02,0x03,EOT}},
+ {0x3, "COM1",
+ {0x30,0x60,0x61,0x70,0xf0,EOT},
+ {0x00,0x00,0x00,0x00,0x00,EOT}},
+ {0x4, "Power Control",
+ {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
+ {0x00,0x00,0x00,0x00,NANA,0x00,EOT}},
+ {0x5, "Mouse",
+ {0x30,0x70,EOT},
+ {0x00,0x00,EOT}},
+ {0x6, "Keyboard",
+ {0x30,0x70,0xf0,EOT},
+ {0x00,0x00,0x00,EOT}},
+ {0x7, "GPIO",
+ {0x30,0x60,0x61,0x70,0x72,0xf0,EOT},
+ {0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
+ {0xa, "Runtime registers",
+ {0x30,0x60,0x61,0x62,0x63,0xf0,0xf1,0xf2,EOT},
+ {0x00,0x00,0x00,0x00,0x00,NANA,RSVD,0x04,EOT}},
{EOT}}},
{0x76, "LPC47M584", { /* From sensors-detect (no datasheet) */
{EOT}}},
@@ -646,6 +680,22 @@
dump_superio((id == 0x77 ? "ASUS" : "SMSC"), reg_table, port, id,
LDN_SEL);
+ if (extra_dump) {
+ uint16_t runtime_base;
+ switch (id) {
+ case 0x5a:
+ runtime_base = regval(port, 0x30) << 4;
+ if (runtime_base)
+ dump_io(runtime_base, 16);
+ else
+ printf("Runtime Register Block not mapped on
this SuperIO.\n");
+
+ break;
+ default:
+ printf("No extra registers known for this chip\n");
+ }
+ }
+
exit_conf_mode_smsc(port);
}
Index: util/superiotool/superiotool.h
===================================================================
--- util/superiotool/superiotool.h (.../branches/upstream/coreboot-v2)
+++ util/superiotool/superiotool.h (.../trunk/coreboot-v2)
@@ -107,6 +107,7 @@
uint16_t id);
void dump_superio(const char *name, const struct superio_registers reg_table[],
uint16_t port, uint16_t id, uint8_t ldn_sel);
+void dump_io(uint16_t iobase, uint16_t length);
void probing_for(const char *vendor, const char *info, uint16_t port);
void print_vendor_chips(const char *vendor,
const struct superio_registers reg_table[]);
Property changes on: .
___________________________________________________________________
Name: svn:ignore
+ coreboot.rom
coreboot-builds
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