Author: myles Date: 2009-03-13 18:20:59 +0100 (Fri, 13 Mar 2009) New Revision: 4002
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2895/Config.lb trunk/coreboot-v2/src/mainboard/tyan/s2895/dsdt.dsl trunk/coreboot-v2/src/superio/smsc/lpc47b397/superio.c Log: This patch reverts SuperIO changes that I was too hasty with. Even though the address of the RTC is 0x70, you need to write 0x400 to it. Now the dump from superiotool matches the factory except 0xf0 of the keyboard. When you boot with the factory BIOS that is 0x04, but with coreboot it is not set. It's trivial because it is reverts. Signed-off-by: Myles Watson <[email protected]> Acked-by: Myles Watson <[email protected]> Modified: trunk/coreboot-v2/src/mainboard/tyan/s2895/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2895/Config.lb 2009-03-13 17:00:46 UTC (rev 4001) +++ trunk/coreboot-v2/src/mainboard/tyan/s2895/Config.lb 2009-03-13 17:20:59 UTC (rev 4002) @@ -269,7 +269,7 @@ device pnp 2e.3 on # Parallel Port io 0x60 = 0x378 irq 0x70 = 7 - drq 0x74 = 3 + drq 0x74 = 4 end device pnp 2e.4 on # Com1 io 0x60 = 0x3f8 @@ -286,7 +286,7 @@ irq 0x72 = 12 end device pnp 2e.8 on # HW Monitor - io 0x60 = 0x290 + io 0x60 = 0x480 chip drivers/generic/generic # LM95221 CPU temp device i2c 2b on end end @@ -295,8 +295,7 @@ end end device pnp 2e.a on # RT - io 0x60 = 0x90 - irq 0x70 = 8 + io 0x60 = 0x400 end end end Modified: trunk/coreboot-v2/src/mainboard/tyan/s2895/dsdt.dsl =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2895/dsdt.dsl 2009-03-13 17:00:46 UTC (rev 4001) +++ trunk/coreboot-v2/src/mainboard/tyan/s2895/dsdt.dsl 2009-03-13 17:20:59 UTC (rev 4002) @@ -188,7 +188,7 @@ Method (_CRS, 0, NotSerialized) { Name (TMP, ResourceTemplate () { - FixedIO (0x0090, 0x02) + FixedIO (0x0070, 0x02) IRQNoFlags () {8} }) Return (TMP) Modified: trunk/coreboot-v2/src/superio/smsc/lpc47b397/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/smsc/lpc47b397/superio.c 2009-03-13 17:00:46 UTC (rev 4001) +++ trunk/coreboot-v2/src/superio/smsc/lpc47b397/superio.c 2009-03-13 17:20:59 UTC (rev 4002) @@ -202,7 +202,7 @@ { &ops, LPC47B397_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, { &ops, LPC47B397_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, { &ops_hwm, LPC47B397_HWM, PNP_IO0, { 0x7f0, 0 }, }, - { &ops, LPC47B397_RT, PNP_IO0 | PNP_IRQ0, { 0x7fc, 0 }, }, + { &ops, LPC47B397_RT, PNP_IO0, { 0x780, 0 }, }, }; static void enable_dev(struct device *dev) -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
