On Wed, Apr 8, 2009 at 8:03 AM, Carl-Daniel Hailfinger <[email protected]> wrote:
> If all of the above is true, it should be possible to use CAR on every > processor which has a fine-grained memory range cache control like MTRR. > Simply make sure the cacheable area is smaller than cache size and > smaller than the minimum aliasing distance, switch caches on and be > happy. (External hardware may need to be told it should not trigger > invalidation.) > Is it really that easy? Eswar, the guy who got us over the hard parts of CAR, indicated that it was really that easy; that all you needed to know about CAR was in Vol. III, you just had to know how to read it (in particular, that CD does not mean Cache Disable). ron -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
