On 21.04.2009 01:20, Peter Stuge wrote: > [email protected] wrote: > >> @@ -778,7 +778,7 @@ >> .page_size = 256, >> .tested = TEST_OK_PREW, >> .probe = probe_spi_rdid, >> - .erase = spi_chip_erase_c7, >> + .erase = spi_chip_erase_60_c7, >> > > Yesterday I had a thought that it might be prudent to go back to > TEST_OK_PRW with these changes, but I didn't bother. >
Actually, we perform a failover. If one opcode does not work, we automatically retry with the other one. So the new erase functionality should be a superset of existing erase functionality. Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
