On 22.04.2009 14:41, Uwe Hermann wrote: > On Wed, Apr 22, 2009 at 01:43:14AM +0200, Carl-Daniel Hailfinger wrote: > >> All "unknown xy SPI chip" entries claim to have status UNTESTED for >> probe/read/erase/write. That is incorrect. >> >> A bit of confusion comes from how the #defines are named. We call them >> TEST_BAD_*, but the message printed by flashrom says: >> "This flash part has status NOT WORKING for operations:" >> >> Something that is unimplemented is definitely not working. >> >> Neither of the chip entries mentioned above has erase or write functions >> implemented, so erase and write are not working. >> Since their size is unknown, we can't read them in. That means read is >> not working as well. >> Probing is a different matter. If a chip-specific probe function had >> matched, we wouldn't have to handle the chip with the "unknown xy SPI >> chip" fallback. I'm tempted to call that "not working" as well, but I'm >> open to discussion on this point. >> >> Signed-off-by: Carl-Daniel Hailfinger <[email protected]> >> > > Sounds reasonable. > > Acked-by: Uwe Hermann <[email protected]> >
Thanks, r4177. Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
