On Mon, May 4, 2009 at 1:26 PM, <[email protected]> wrote: > Author: ruik > Date: 2009-05-04 21:26:43 +0200 (Mon, 04 May 2009) > New Revision: 4252 > > Modified: > trunk/coreboot-v2/src/cpu/amd/car/clear_init_ram.c > Log: > The rev 4099 broke ECC boards, they need to have tidy the ECC tags. Myles > reverted this change. > I think we can return the 4099 back under HAVE_ACPI_RESUME define to make > everyone happy (and booting ;).
Did you try Ron's suggestion of reading and writing the memory instead of clearing it? I'd prefer a solution without an #if. If that's not feasible I think the comment is too weak. Note: This breaks ECC boards. Thanks, Myles > Signed-off-by: Rudolf Marek <[email protected]> > Acked-by: Rudolf Marek <[email protected]> > > > > Modified: trunk/coreboot-v2/src/cpu/amd/car/clear_init_ram.c > =================================================================== > --- trunk/coreboot-v2/src/cpu/amd/car/clear_init_ram.c 2009-05-02 21:30:57 > UTC (rev 4251) > +++ trunk/coreboot-v2/src/cpu/amd/car/clear_init_ram.c 2009-05-04 19:26:43 > UTC (rev 4252) > @@ -6,8 +6,13 @@ > // gcc 3.4.5 will inline the copy_and_run and clear_init_ram in > post_cache_as_ram > // will reuse %edi as 0 from clear_memory for copy_and_run part, > actually it is increased already > // so noline clear_init_ram > + > +#if HAVE_ACPI_RESUME == 1 > + /* clear only coreboot used region of memory. Note: this may break > ECC enabled boards */ > + clear_memory( _RAMBASE, (CONFIG_LB_MEM_TOPK << 10) - _RAMBASE - > DCACHE_RAM_SIZE); > +#else > clear_memory(0, ((CONFIG_LB_MEM_TOPK<<10) - DCACHE_RAM_SIZE)); > - > +#endif > } > > /* be warned, this file will be used by core other than core 0/node 0 or > core0/node0 when cpu_reset*/ > > > -- > coreboot mailing list: [email protected] > http://www.coreboot.org/mailman/listinfo/coreboot > -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
