On Fri, May 8, 2009 at 8:14 PM, Myles Watson <[email protected]> wrote: > On Fri, May 8, 2009 at 9:08 PM, ron minnich <[email protected]> wrote: >> The only thing that occurs right off is that configuraitons are just >> different on the one missing an opteron. > > I should have been clearer. It's the same board. They both have the > same module installed. In one case the module doesn't respond to > configuration cycles and is disabled in hardware (recognized as an > open socket.)
understood. But one board I worked on had a full I/O bus on each opteron, which meant the pci config space changed radically with one removed. > >> How is HT wired up on this board? Some boards have a completely >> independent IO bus on each socket. > > The Opteron is connected to: > Link 0: Nvidia ck804 > Link 1: Opteron socket / FPGA > Link 2: Amd 8132 > > The strange thing is that the missing/garbled messages are during > resource allocation on LInk 0. I'll probably ignore it for a while > longer if there's no way to track it down. I'm just worried that > something is trashing memory, and that some time it will be a message > that I need to see :) is it possible that the the act of allocating resources puts some config space registers into a state such that 0x3f8 is inaccessible or pointing to some other device? I hope this question even makes sense -- it's been a long day. thanks ron -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
