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This patch adds support for BIOS flashing on the all SiliconImage SATA controllers. It was easy because 1) flashrom has now nice API 2) documentation is public on the web site Signed-off-by: Rudolf Marek <[email protected]> PS: maybe we could write to that company and tell them. For Windows/Linux they force the customer to download freedos from sourceforge ;) There is also a file with a list of roms: AMD’s Am29F010B/Am29LV010B (1 Megabit) and Am29F040B (4 Megabit) AMD’s Am29LV400B (4 Megabit) variable sectors Atmel’s AT49BV512 (64KB), AT29LV010A (1 Megabit), and AT49LV040 (4 Megabit) SST’s 39SF010 (1 Megabit), 39VF010 (1 Megabit), 39VF020 (2 Megabit), 39SF020 (2 Megabit), and 39VF040 (4 Megabit). SANYO’s LE28C1001D (1 Megabit) WinBound’s 29EE011 (1 Megabit) and 29EE512 (64KB) STMicroelectronics M29F010B/ M29W010B (1 Megabit) STMicroelectronics M29W040B (4 Megabit) STMicroelectronics M29W400B (4 Megabit) variable sectors MXIC MX29LV040 (4 Megabit) PMC Pm39LV010(1Megabit) and PMC Pm39LV040 (4Megabit) Thanks, Rudolf -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.9 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org iEYEARECAAYFAkoQQC0ACgkQ3J9wPJqZRNXUOwCgruIU+Uk2s0YCYvrcEWqScfvO MyoAnRhIPohNEmz7SyIpkeq9d4n77NB2 =qk7V -----END PGP SIGNATURE-----
Index: sata_sil.c =================================================================== --- /dev/null 1970-01-01 00:00:00.000000000 +0000 +++ sata_sil.c 2009-05-17 18:13:19.683305043 +0200 @@ -0,0 +1,131 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009 Rudolf Marek <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* Datasheets can be found on http://www.siliconimage.com. Great thanks! */ + +#include <stdlib.h> +#include <string.h> +#include <fcntl.h> +#include <sys/types.h> +#include <sys/stat.h> +#include <errno.h> +#include "flash.h" + +#define PCI_VENDOR_ID_SIL 0x1095 + +uint8_t *sil_bar; +uint16_t id; + +struct pcidev_status satas_sil[] = { + {0x1095, 0x0680, PCI_NT, "Silicon Image, Inc.", "PCI0680 Ultra ATA-133 Host Controller"}, + {0x1095, 0x3114, PCI_OK, "Silicon Image, Inc.", "SiI 3114 [SATALink/SATARaid] Serial ATA Controller"}, + {0x1095, 0x3124, PCI_NT, "Silicon Image, Inc.", "SiI 3124 PCI-X Serial ATA Controller"}, + {0x1095, 0x3132, PCI_OK, "Silicon Image, Inc.", "SiI 3132 Serial ATA Raid II Controller"}, + {0x1095, 0x3512, PCI_NT, "Silicon Image, Inc.", "SiI 3512 [SATALink/SATARaid] Serial ATA Controller"}, + {}, +}; + +int satasil_init(void) +{ + uint32_t addr; + uint16_t reg_offset; + + get_io_perms(); + + pcidev_init(PCI_VENDOR_ID_SIL, satas_sil); + + id = pcidev_dev->device_id; + + if ((id == 0x3132) || (id == 0x3124)) { + /* BAR 0, offset 0x70 */ + addr = pci_read_long(pcidev_dev, PCI_IO_BASE_ADDRESS) & ~0x07; + reg_offset = 0x70; + } else { + /* BAR 5, offset 0x50 */ + addr = pci_read_long(pcidev_dev, PCI_IO_BASE_ADDRESS + (5 * 4)) & ~0x07; + reg_offset = 0x50; + } + + sil_bar = physmap("SATA SIL registers", addr, 0x100); + sil_bar += reg_offset; + + /* check if rom cycle are OK */ + if (!(mmio_readl(sil_bar)) & (1 << 26)) { + printf("Warning: Flash seems unconnected\n"); + } + + return 0; +} + +int satasil_shutdown(void) +{ + + free(pcidev_bdf); + pci_cleanup(pacc); +#if defined(__FreeBSD__) || defined(__DragonFly__) + close(io_fd); +#endif + return 0; +} + +void *satasil_map(const char *descr, unsigned long phys_addr, size_t len) +{ + return 0; +} + +void satasil_unmap(void *virt_addr, size_t len) +{ +} + +void satasil_chip_writeb(uint8_t val, chipaddr addr) +{ + + uint32_t ctrl_reg, addr_reg; + + while ((ctrl_reg = mmio_readl(sil_bar)) & (1 << 25)) ; + + /* Mask out unused/reserved bits, set writes and start transaction */ + ctrl_reg &= 0xfcf80000; + ctrl_reg |= (1 << 25) | (0 << 24) | ((uint32_t) addr & 0xffffff); + + addr_reg = (mmio_readl((sil_bar + 4)) & ~0xff) | val; + mmio_writel(addr_reg, (sil_bar + 4)); + mmio_writel(ctrl_reg, sil_bar); + + while (mmio_readl(sil_bar) & (1 << 25)) ; + +} + +uint8_t satasil_chip_readb(const chipaddr addr) +{ + uint32_t ctrl_reg; + + while ((ctrl_reg = mmio_readl(sil_bar)) & (1 << 25)) ; + + /* Mask out unused/reserved bits, set reads and start transaction */ + ctrl_reg &= 0xfcf80000; + ctrl_reg |= (1 << 25) | (1 << 24) | ((uint32_t) addr & 0xffffff); + + mmio_writel(ctrl_reg, sil_bar); + + while ((mmio_readl(sil_bar)) & (1 << 25)) ; + + return (mmio_readl(sil_bar + 4)) & 0xff; +} Index: flash.h =================================================================== --- flash.h.orig 2009-05-17 16:56:05.955199457 +0200 +++ flash.h 2009-05-17 18:20:22.067198662 +0200 @@ -83,6 +83,7 @@ #define PROGRAMMER_INTERNAL 0x00 #define PROGRAMMER_DUMMY 0x01 #define PROGRAMMER_NIC3COM 0x02 +#define PROGRAMMER_SATASIL 0x03 struct programmer_entry { const char *vendor; @@ -559,6 +560,8 @@ /* pcidev.c */ #define PCI_OK 0 #define PCI_NT 1 /* Not tested */ +#define PCI_IO_BASE_ADDRESS 0x10 + extern uint32_t io_base_addr; extern struct pci_access *pacc; extern struct pci_filter filter; @@ -658,6 +661,16 @@ uint8_t nic3com_chip_readb(const chipaddr addr); extern struct pcidev_status nics_3com[]; +/* satasil.c */ +int satasil_init(void); +int satasil_shutdown(void); +void *satasil_map(const char *descr, unsigned long phys_addr, size_t len); +void satasil_unmap(void *virt_addr, size_t len); +void satasil_chip_writeb(uint8_t val, chipaddr addr); +uint8_t satasil_chip_readb(const chipaddr addr); +extern struct pcidev_status satas_sil[]; + + /* flashrom.c */ extern int verbose; #define printf_debug(x...) { if (verbose) printf(x); } Index: Makefile =================================================================== --- Makefile.orig 2009-05-17 16:56:05.987199903 +0200 +++ Makefile 2009-05-17 16:56:16.011199891 +0200 @@ -33,7 +33,7 @@ sst49lfxxxc.o sst_fwhub.o layout.o cbtable.o flashchips.o physmap.o \ flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o \ ichspi.o w39v040c.o sb600spi.o wbsio_spi.o m29f002.o internal.o \ - dummyflasher.o pcidev.o nic3com.o + dummyflasher.o pcidev.o nic3com.o sata_sil.o all: pciutils dep $(PROGRAM) Index: flashrom.c =================================================================== --- flashrom.c.orig 2009-05-17 16:55:53.202147400 +0200 +++ flashrom.c 2009-05-17 18:06:30.728199872 +0200 @@ -74,6 +74,19 @@ .chip_writel = fallback_chip_writel, }, + { + .init = satasil_init, + .shutdown = satasil_shutdown, + .map_flash_region = satasil_map, + .unmap_flash_region = satasil_unmap, + .chip_readb = satasil_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_writeb = satasil_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + }, + {}, }; @@ -503,6 +516,10 @@ programmer = PROGRAMMER_NIC3COM; if (optarg[7] == '=') pcidev_bdf = strdup(optarg + 8); + } else if (strncmp(optarg, "satasil", 7) == 0) { + programmer = PROGRAMMER_SATASIL; + if (optarg[7] == '=') + pcidev_bdf = strdup(optarg + 8); } else { printf("Error: Unknown programmer.\n"); exit(1); Index: pcidev.c =================================================================== --- pcidev.c.orig 2009-05-17 18:11:54.948198859 +0200 +++ pcidev.c 2009-05-17 18:12:00.355200136 +0200 @@ -26,8 +26,6 @@ #include <errno.h> #include "flash.h" -#define PCI_IO_BASE_ADDRESS 0x10 - uint32_t io_base_addr; struct pci_access *pacc; struct pci_filter filter;
sata_sil_next.patch.sig
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