Hi,
attached patch moves coreboot_ram and coreboot_apc to CBFS. That allows to
reduce the size of the bootblock (the patch does this for kontron/986lcd-m),
though I'll work on a more generic solution next (that will fix normal images
with CBFS, too)
coreboot_ram and coreboot_apc are lzma compressed, which gives ~12kb versus
nrv2b on the kontron, some of which will be used for the additional cbfs+lzma
code in the ROM stage.
I tested it with qemu, kontron and amd/serengenti_cheetah (both with and
without CBFS)
The patch for src/lib/cbfs.c isn't very clean right now, I'll fix it up later
by adding ntohll there and fixing up cbfstool to create those fields in
network order, too.
The patch creates three new files by copying:
A + src/arch/i386/init/ldscript_fallback_cbfs.lb
A + src/arch/i386/init/ldscript_cbfs.lb
A + src/arch/i386/lib/cbfs_and_run.c
They are created from ldscript_fallback.lb, ldscript.lb and copy_and_run.c in
the respective directories, then modified.
An example on how the CBFS is used now (as said, the bootblocks can be reduced
in size)
cbfstool coreboot-builds/kontron_986lcd-m/coreboot.rom print
coreboot-builds/kontron_986lcd-m/coreboot.rom: 1024 kB, bootblocksize 131072,
romsize 1048576, offset 0x0
Alignment: 16 bytes
Name Offset Type Size
normal/payload 0x0 payload 23229
normal/coreboot_ram 0x5af0 stage 107448
fallback/payload 0x1fee0 payload 23229
fallback/coreboot_ram 0x259e0 stage 107053
0x3fc50 free 656280
cbfstool coreboot-builds/amd_serengeti_cheetah/coreboot.rom print
coreboot-builds/amd_serengeti_cheetah/coreboot.rom: 512 kB, bootblocksize
266240, romsize 524288, offset 0x0
Alignment: 16 bytes
Name Offset Type Size
normal/payload 0x0 payload 23229
normal/coreboot_ram 0x5af0 stage 61307
normal/coreboot_apc 0x14ab0 stage 5687
fallback/payload 0x16120 payload 23229
fallback/coreboot_ram 0x1bc20 stage 60849
fallback/coreboot_apc 0x2aa10 stage 5687
0x2c080 free 77704
Signed-off-by: Patrick Georgi <[email protected]>
Index: src/cpu/amd/car/copy_and_run.c
===================================================================
--- src/cpu/amd/car/copy_and_run.c (Revision 4311)
+++ src/cpu/amd/car/copy_and_run.c (Arbeitskopie)
@@ -3,6 +3,31 @@
2006/05/02 - stepan: move nrv2b to an extra file.
*/
+#if CONFIG_CBFS == 1
+void cbfs_and_run_core(char*, unsigned ebp);
+
+static void copy_and_run(void)
+{
+# if USE_FALLBACK_IMAGE == 1
+ cbfs_and_run_core("fallback/coreboot_ram", 0);
+# else
+ cbfs_and_run_core("normal/coreboot_ram", 0);
+# endif
+}
+
+#if CONFIG_AP_CODE_IN_CAR == 1
+
+static void copy_and_run_ap_code_in_car(unsigned ret_addr)
+{
+# if USE_FALLBACK_IMAGE == 1
+ cbfs_and_run_core("fallback/coreboot_apc", ret_addr);
+# else
+ cbfs_and_run_core("normal/coreboot_apc", ret_addr);
+# endif
+}
+#endif
+
+#else
void copy_and_run_core(u8 *src, u8 *dst, unsigned long ilen, unsigned ebp);
extern u8 _liseg, _iseg, _eiseg;
@@ -35,3 +60,4 @@
copy_and_run_core(src, dst, ilen, ret_addr);
}
#endif
+#endif
Index: src/cpu/x86/car/copy_and_run.c
===================================================================
--- src/cpu/x86/car/copy_and_run.c (Revision 4311)
+++ src/cpu/x86/car/copy_and_run.c (Arbeitskopie)
@@ -2,6 +2,22 @@
(Written by Patrick Georgi <[email protected]> for coresystems GmbH
*/
+#if CONFIG_CBFS == 1
+void cbfs_and_run_core(char*, unsigned ebp);
+
+static void copy_and_run(unsigned cpu_reset)
+{
+ if (cpu_reset == 1) cpu_reset = -1;
+ else cpu_reset = 0;
+
+# if USE_FALLBACK_IMAGE == 1
+ cbfs_and_run_core("fallback/coreboot_ram", cpu_reset);
+# else
+ cbfs_and_run_core("normal/coreboot_ram", cpu_reset);
+# endif
+}
+
+#else
void copy_and_run_core(u8 *src, u8 *dst, unsigned long ilen, unsigned ebp);
extern u8 _liseg, _iseg, _eiseg;
@@ -21,3 +37,5 @@
copy_and_run_core(src, dst, ilen, cpu_reset);
}
+#endif
+
Index: src/mainboard/amd/serengeti_cheetah/Options.lb
===================================================================
--- src/mainboard/amd/serengeti_cheetah/Options.lb (Revision 4311)
+++ src/mainboard/amd/serengeti_cheetah/Options.lb (Arbeitskopie)
@@ -333,5 +333,5 @@
# CBFS
#
#
-default CONFIG_CBFS=0
+default CONFIG_CBFS=1
end
Index: src/mainboard/amd/serengeti_cheetah/Config.lb
===================================================================
--- src/mainboard/amd/serengeti_cheetah/Config.lb (Revision 4311)
+++ src/mainboard/amd/serengeti_cheetah/Config.lb (Arbeitskopie)
@@ -100,7 +100,6 @@
depends "$(MAINBOARD)/apc_auto.c option_table.h"
action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(MAINBOARD)/apc_auto.c -o $@"
end
- ldscript /arch/i386/init/ldscript_apc.lb
end
end
Index: src/lib/cbfs.c
===================================================================
--- src/lib/cbfs.c (Revision 4311)
+++ src/lib/cbfs.c (Arbeitskopie)
@@ -38,14 +38,11 @@
memcpy(dst, src, len);
return 0;
-#if CONFIG_COMPRESSED_PAYLOAD_LZMA==1
-
case CBFS_COMPRESS_LZMA: {
unsigned long ulzma(unsigned char *src, unsigned char *dst);
ulzma(src, dst);
}
return 0;
-#endif
#if CONFIG_COMPRESSED_PAYLOAD_NRV2B==1
case CBFS_COMPRESS_NRV2B: {
@@ -186,16 +183,17 @@
return (void *) -1;
printk_info("Stage: load @ %d/%d bytes, enter @ %llx\n",
- ntohl((u32) stage->load), ntohl(stage->memlen),
+ (u32) stage->load, stage->memlen,
stage->entry);
- memset((void *) ntohl((u32) stage->load), 0, ntohl(stage->memlen));
+ memset((void *) (u32) stage->load, 0, stage->memlen);
- if (cbfs_decompress(ntohl(stage->compression),
+ if (cbfs_decompress(stage->compression,
((unsigned char *) stage) +
sizeof(struct cbfs_stage),
- (void *) ntohl((u32) stage->load),
- ntohl(stage->len)))
+ (void *) (u32) stage->load,
+ stage->len))
return (void *) -1;
+ printk_info("Stage: done loading.\n");
entry = stage->entry;
// return (void *) ntohl((u32) stage->entry);
Index: src/arch/i386/Config.lb
===================================================================
--- src/arch/i386/Config.lb (Revision 4311)
+++ src/arch/i386/Config.lb (Arbeitskopie)
@@ -1,3 +1,4 @@
+uses CONFIG_CBFS
uses CONFIG_SMP
uses CONFIG_PRECOMPRESSED_PAYLOAD
uses CONFIG_USE_INIT
@@ -7,18 +8,39 @@
init init/crt0.S.lb
+if CONFIG_CBFS
+ if USE_FAILOVER_IMAGE
+ else
+ initobject /src/lib/cbfs.o
+ initobject /src/console/vsprintf.o
+ initobject /src/lib/lzma.o
+ end
+end
+
if HAVE_FAILOVER_BOOT
- if USE_FAILOVER_IMAGE
- ldscript init/ldscript_failover.lb
- else
- ldscript init/ldscript.lb
- end
+ if USE_FAILOVER_IMAGE
+ ldscript init/ldscript_failover.lb
+ else
+ if CONFIG_CBFS
+ ldscript init/ldscript_cbfs.lb
+ else
+ ldscript init/ldscript.lb
+ end
+ end
else
- if USE_FALLBACK_IMAGE
- ldscript init/ldscript_fallback.lb
- else
- ldscript init/ldscript.lb
- end
+ if CONFIG_CBFS
+ if USE_FALLBACK_IMAGE
+ ldscript init/ldscript_fallback_cbfs.lb
+ else
+ ldscript init/ldscript_cbfs.lb
+ end
+ else
+ if USE_FALLBACK_IMAGE
+ ldscript init/ldscript_fallback.lb
+ else
+ ldscript init/ldscript.lb
+ end
+ end
end
makerule all
Index: src/arch/i386/init/crt0.S.lb
===================================================================
--- src/arch/i386/init/crt0.S.lb (Revision 4311)
+++ src/arch/i386/init/crt0.S.lb (Arbeitskopie)
@@ -73,6 +73,10 @@
movl $0x4000000, %esp
movl %esp, %ebp
pushl %esi
+#ifdef CONFIG_CBFS
+ pushl $str_coreboot_ram_name
+ call cbfs_and_run_core
+#else
movl $_liseg, %esi
movl $_iseg, %edi
movl $_eiseg, %ecx
@@ -81,6 +85,7 @@
pushl %edi
pushl %esi
call copy_and_run_core
+#endif
.Lhlt:
intel_chip_post_macro(0xee) /* post fe */
@@ -137,6 +142,13 @@
#else
str_copying_to_ram: .string "Copying coreboot to RAM.\r\n"
#endif
+#if CONFIG_CBFS
+# if USE_FALLBACK_IMAGE == 1
+str_coreboot_ram_name: .string "fallback/coreboot_ram"
+# else
+str_coreboot_ram_name: .string "normal/coreboot_ram"
+# endif
+#endif
str_pre_main: .string "Jumping to coreboot.\r\n"
.previous
Index: src/arch/i386/init/ldscript_fallback_cbfs.lb
===================================================================
--- src/arch/i386/init/ldscript_fallback_cbfs.lb (Revision 4311)
+++ src/arch/i386/init/ldscript_fallback_cbfs.lb (Arbeitskopie)
@@ -32,17 +32,10 @@
*/
TARGET(binary)
-INPUT(coreboot_ram.rom)
SECTIONS
{
. = _ROMBASE;
- .ram . : {
- _ram = . ;
- coreboot_ram.rom(*)
- _eram = . ;
- }
-
/* cut _start into last 64k*/
_x = .;
. = (_x < (_ROMBASE - 0x10000 + ROM_IMAGE_SIZE)) ? (_ROMBASE - 0x10000 + ROM_IMAGE_SIZE) : _x;
@@ -61,10 +54,6 @@
_lrom = LOADADDR(.rom);
_elrom = LOADADDR(.rom) + SIZEOF(.rom);
- _iseg = _RAMBASE;
- _eiseg = _iseg + SIZEOF(.ram);
- _liseg = _ram;
- _eliseg = _eram;
/DISCARD/ : {
*(.comment)
Eigenschaftsänderungen: src/arch/i386/init/ldscript_fallback_cbfs.lb
___________________________________________________________________
Hinzugefügt: svn:mergeinfo
Index: src/arch/i386/init/ldscript_cbfs.lb
===================================================================
--- src/arch/i386/init/ldscript_cbfs.lb (Revision 4311)
+++ src/arch/i386/init/ldscript_cbfs.lb (Arbeitskopie)
@@ -32,17 +32,10 @@
*/
TARGET(binary)
-INPUT(coreboot_ram.rom)
SECTIONS
{
. = _ROMBASE;
- .ram . : {
- _ram = . ;
- coreboot_ram.rom(*)
- _eram = . ;
- }
-
/* This section might be better named .setup */
.rom . : {
_rom = .;
@@ -56,10 +49,6 @@
_lrom = LOADADDR(.rom);
_elrom = LOADADDR(.rom) + SIZEOF(.rom);
- _iseg = _RAMBASE;
- _eiseg = _iseg + SIZEOF(.ram);
- _liseg = _ram;
- _eliseg = _eram;
/DISCARD/ : {
*(.comment)
Eigenschaftsänderungen: src/arch/i386/init/ldscript_cbfs.lb
___________________________________________________________________
Hinzugefügt: svn:mergeinfo
Index: src/arch/i386/lib/Config.lb
===================================================================
--- src/arch/i386/lib/Config.lb (Revision 4311)
+++ src/arch/i386/lib/Config.lb (Arbeitskopie)
@@ -1,6 +1,7 @@
uses CONFIG_USE_INIT
uses CONFIG_USE_PRINTK_IN_CAR
uses USE_FAILOVER_IMAGE
+uses CONFIG_CBFS
object c_start.S
object cpu.c
@@ -14,5 +15,9 @@
if USE_FAILOVER_IMAGE
else
- initobject copy_and_run.o
+ if CONFIG_CBFS
+ initobject cbfs_and_run.o
+ else
+ initobject copy_and_run.o
+ end
end
Index: src/arch/i386/lib/cbfs_and_run.c
===================================================================
--- src/arch/i386/lib/cbfs_and_run.c (Revision 4311)
+++ src/arch/i386/lib/cbfs_and_run.c (Arbeitskopie)
@@ -4,44 +4,14 @@
*/
#include <console/console.h>
-#include <stdint.h>
-#include <string.h>
+#include <cbfs.h>
-#if CONFIG_COMPRESS
-#define ENDIAN 0
-#define BITSIZE 32
-#include "../lib/nrv2b.c"
-#endif
-
-void copy_and_run_core(u8 *src, u8 *dst, unsigned long ilen, unsigned ebp)
+void cbfs_and_run_core(char *filename, unsigned ebp)
{
- unsigned long olen;
-
-#if CONFIG_USE_INIT
- printk_spew("src=%08x\r\n",src);
- printk_spew("dst=%08x\r\n",dst);
-#else
- print_spew("src="); print_spew_hex32((uint32_t)src); print_spew("\r\n");
- print_spew("dst="); print_spew_hex32((uint32_t)dst); print_spew("\r\n");
-#endif
-
-#if !CONFIG_COMPRESS
- print_debug("Copying image to RAM.\r\n");
- memcpy(src, dst, ilen);
- olen = ilen;
-#else
- print_debug("Uncompressing image to RAM.\r\n");
-// dump_mem(src, src+0x100);
- olen = unrv2b(src, dst, &ilen);
-#endif
-
-// dump_mem(dst, dst+0x100);
-#if CONFIG_USE_INIT
- printk_spew("image length = %08x\r\n", olen);
-#else
- print_spew("image length = "); print_spew_hex32(olen); print_spew("\r\n");
-#endif
+ u8 *dst;
print_debug("Jumping to image.\r\n");
+ dst = cbfs_load_stage(filename);
+ print_debug("Jumping to image.\r\n");
__asm__ volatile (
"movl %%eax, %%ebp\n\t"
Eigenschaftsänderungen: src/arch/i386/lib/cbfs_and_run.c
___________________________________________________________________
Hinzugefügt: svn:mergeinfo
Index: targets/kontron/986lcd-m/Config-abuild.lb
===================================================================
--- targets/kontron/986lcd-m/Config-abuild.lb (Revision 4311)
+++ targets/kontron/986lcd-m/Config-abuild.lb (Arbeitskopie)
@@ -11,18 +11,18 @@
__LOGLEVEL__
option ROM_SIZE=1024*1024
-option FALLBACK_SIZE=1024*512
+option FALLBACK_SIZE=1024*64
romimage "normal"
option USE_FALLBACK_IMAGE=0
- option ROM_IMAGE_SIZE=0x24000
+ option ROM_IMAGE_SIZE=0x10000
option COREBOOT_EXTRA_VERSION=".0-normal"
payload __PAYLOAD__
end
romimage "fallback"
option USE_FALLBACK_IMAGE=1
- option ROM_IMAGE_SIZE=0x24000
+ option ROM_IMAGE_SIZE=0x10000
option COREBOOT_EXTRA_VERSION=".0-fallback"
payload __PAYLOAD__
end
Index: util/newconfig/config.g
===================================================================
--- util/newconfig/config.g (Revision 4311)
+++ util/newconfig/config.g (Arbeitskopie)
@@ -2303,6 +2303,9 @@
#failover is a hack that will go away soon.
if (j != "failover") and (rommapping[j] != "/dev/null"):
file.write("\t./cbfstool %s add-payload %s %s/payload $(CBFS_COMPRESS_FLAG)\n" % (i.name, rommapping[j], j,))
+ if (j != "failover"):
+ file.write("\t./cbfstool %s add-stage %s/coreboot_ram %s/coreboot_ram $(CBFS_COMPRESS_FLAG)\n" % (i.name, j, j,))
+ file.write("\tif [ -f %s/coreboot_apc ]; then ./cbfstool %s add-stage %s/coreboot_apc %s/coreboot_apc $(CBFS_COMPRESS_FLAG); fi\n" % (j, i.name, j, j,))
file.write("\t./cbfstool %s print\n" % i.name)
file.write("\n")
file.write("else\n\n")
--
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