Argh! My fault... It belongs into Options.lb, not Config.lb. I corrected the Wiki page.
On 29.05.2009 20:08 Uhr, René Reuter wrote: > There are no other "uses" statements in that config file. I'm using > coreboot-v2 if that helps. I'm posting the first lines of my config file: > > debian:/home/sphinx/coreboot/coreboot-v2# vim > src/mainboard/emulation/qemu-x86/Config.lb > > ## > ## Compute the location and size of where this firmware image > ## (coreboot plus bootloader) will live in the boot rom chip. > ## > default ROM_SIZE = 2048 * 1024 > default ROM_SECTION_SIZE = ROM_SIZE > default ROM_SECTION_OFFSET = 0 > > uses CONFIG_GDB_STUB > default CONFIG_GDB_STUB=1 > > ## > ## Compute the start location and size size of > ## The coreboot bootloader. > ## > default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) > default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + > ROM_SECTION_OFFSET + 1) > > > René > > > 2009/5/29 Stefan Reinauer <[email protected] > <mailto:[email protected]>> > > You need to put the "uses" in the top half of the file (to the > other uses statements) and the "default" into the lower half > (where the other default statements are) > > > > On 29.05.2009 19:05 Uhr, René Reuter wrote: >> Here is the build fail when I put the strings into the mainboard >> config.lb <http://config.lb> (src/mainboard/emulation/qemu-x86) >> >> Configuring DIR /boot/Config.lb >> add object src/boot/elfboot.o source $(TOP)//src/boot/elfboot.c >> add object src/boot/hardwaremain.o source >> $(TOP)//src/boot/hardwaremain.c >> partobj dir >> /home/sphinx/coreboot/coreboot-v2/src/mainboard/emulation/qemu-x86 parent >> 0 part mainboard >> INSTANCE 0 >> curpart.uses_options is {'ROM_IMAGE_SIZE': <__main__.option >> instance at 0xb787ec6c>, 'CROSS_COMPILE': <__main__.option >> instance at 0xb7850fcc>, 'MAINBOARD': <__main__.option instance >> at 0xb7ba528c>, '_ROMBASE': <__main__.option instance at >> 0xb788244c>, 'ROM_SECTION_SIZE': <__main__.option instance at >> 0xb787ee6c>, 'ROM_SIZE': <__main__.option instance at >> 0xb787ea8c>, 'USE_OPTION_TABLE': <__main__.option instance at >> 0xb7b98c2c>, 'CONFIG_PCI_OPTION_ROM_RUN_VM86': <__main__.option >> instance at 0xb7bcc64c>, 'HAVE_MP_TABLE': <__main__.option >> instance at 0xb7baa62c>, 'HAVE_HARD_RESET': <__main__.option >> instance at 0xb7bb9aac>, 'ARCH': <__main__.option instance at >> 0xb7850c4c>, 'CONFIG_CONSOLE_SERIAL8250': <__main__.option >> instance at 0xb7b9ef6c>, 'ROM_SECTION_OFFSET': <__main__.option >> instance at 0xb788206c>, 'XIP_ROM_BASE': <__main__.option >> instance at 0xb7b981cc>, 'MAINBOARD_PART_NUMBER': >> <__main__.option instance at 0xb7ba53ec>, 'FALLBACK_SIZE': >> <__main__.option instance at 0xb787e68c>, 'MAINBOARD_VENDOR': >> <__main__.option instance at 0xb7ba55cc>, 'CONFIG_PCI_ROM_RUN': >> <__main__.option instance at 0xb7bcc04c>, >> 'CONFIG_PRECOMPRESSED_PAYLOAD': <__main__.option instance at >> 0xb7bae5ec>, 'PAYLOAD_SIZE': <__main__.option instance at >> 0xb788224c>, 'CONFIG_COMPRESS': <__main__.option instance at >> 0xb7b9858c>, 'USE_FALLBACK_IMAGE': <__main__.option instance at >> 0xb787e2cc>, 'HOSTCC': <__main__.option instance at 0xb78762ec>, >> 'CC': <__main__.option instance at 0xb787616c>, >> 'MAXIMUM_CONSOLE_LOGLEVEL': <__main__.option instance at >> 0xb7ba13ac>, 'XIP_ROM_SIZE': <__main__.option instance at >> 0xb7b983ac>, 'HAVE_PIRQ_TABLE': <__main__.option instance at >> 0xb7bb2b2c>, 'HEAP_SIZE': <__main__.option instance at >> 0xb7882e2c>, 'HAVE_FALLBACK_BOOT': <__main__.option instance at >> 0xb787beec>, 'IRQ_SLOT_COUNT': <__main__.option instance at >> 0xb7bb2dec>, 'STACK_SIZE': <__main__.option instance at >> 0xb7882bec>, 'CONFIG_ROM_PAYLOAD_START': <__main__.option >> instance at 0xb7bae14c>, 'DEFAULT_CONSOLE_LOGLEVEL': >> <__main__.option instance at 0xb7ba124c>, 'USE_DCACHE_RAM': >> <__main__.option instance at 0xb7b9346c>, >> 'COREBOOT_EXTRA_VERSION': <__main__.option instance at >> 0xb78769ac>, 'CONFIG_COMPRESSED_PAYLOAD_LZMA': <__main__.option >> instance at 0xb7bae48c>, 'CONFIG_CBFS': <__main__.option instance >> at 0xb7baee2c>, 'CONFIG_COMPRESSED_PAYLOAD_NRV2B': >> <__main__.option instance at 0xb7bae32c>, '_RAMBASE': >> <__main__.option instance at 0xb7b930ac>, 'CONFIG_ROM_PAYLOAD': >> <__main__.option instance at 0xb7baafcc>, 'OBJCOPY': >> <__main__.option instance at 0xb787662c>, 'HAVE_OPTION_TABLE': >> <__main__.option instance at 0xb7b98acc>} >> >> ===> ERROR: Option uses undefined (missing use command?) >> emulation/qemu-x86/Config.lb:0 >> mainboard/emulation/qemu-x86/Config.lb:0 >> >> >> And here are the CFLAGS in src/config/Config.lb >> >> makedefine CPPFLAGS := -I$(TOP)/src/include >> -I$(TOP)/src/arch/$(ARCH)/include -I$(GCC_INC_DIR) $(CPUFLAGS) >> makedefine CFLAGS := $(CPU_OPT) $(DISTRO_CFLAGS) $(CPPFLAGS) -Os >> -g -nostdinc -nostdlib -Wall -Wundef -Wstrict-prototypes >> -Wno-trigraphs -Werror-implicit-function-declaration >> -Wstrict-aliasing -Wshadow -fno-common -ffreestanding >> -fno-builtin -fomit-frame-pointer >> >> if ASSEMBLER_DEBUG >> makedefine DEBUG_CFLAGS := -g -dA -fverbose-asm >> end >> >> >> Hope that will help. >> >> Regards, >> >> René >> >> >> 2009/5/29 Carl-Daniel Hailfinger >> <[email protected] >> <mailto:[email protected]>> >> >> Hi René, >> >> On 28.05.2009 16:28, René Reuter wrote: >> > I'm trying to set up the gdb debugger with coreboot and >> qemu. I've followed >> > the instructions on that page: >> http://www.coreboot.org/Debugging >> > >> > If I put >> > >> > uses CONFIG_GDB_STUB >> > default CONFIG_GDB_STUB=1 >> > >> > into the mainboards config.lb <http://config.lb> how it's >> written in the instructions the >> > ./buildtarget will fail. >> >> How does it fail? Please paste the last few lines of the log >> so we can >> investigate. >> >> > That's why I put it into src/config/Config.lb, then >> > the build is successful but gdb can't find any debugging >> symbols in the >> > coreboot.ram. >> > >> > The CFLAGS are all set correct. >> > >> > Does anybody know an idea what I'm doing wrong? >> > >> >> With more info, we can probably figure it out. >> >> Regards, >> Carl-Daniel >> >> -- >> http://www.hailfinger.org/ >> >> > > > -- > coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. > Tel.: +49 761 7668825 • Fax: +49 761 7664613 > Email: [email protected] <mailto:[email protected]> • > http://www.coresystems.de/ > Registergericht: Amtsgericht Freiburg • HRB 7656 > Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866 > > > -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: [email protected] • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866
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