Modify it based on the RPR. 5.7.7. Switching GPPSB Configuration By Register Programming.
Signed-off-by: Zheng Bao <[email protected]> Index: src/southbridge/amd/rs690/rs690_pcie.c =================================================================== --- src/southbridge/amd/rs690/rs690_pcie.c (revision 469) +++ src/southbridge/amd/rs690/rs690_pcie.c (working copy) @@ -148,7 +148,7 @@ /* waits until SB has trained to L0, poll for bit0-5 = 0x10 */ do { reg = nbpcie_p_read_index(sb_dev, PCIE_LC_STATE0); - reg &= 0x1f; /* remain LSB 5 bits */ + reg &= 0x3f; /* remain LSB [5:0] bits */ } while (LC_STATE_RECONFIG_GPPSB != reg); /* ensures that virtual channel negotiation is completed. poll for bit1 = 0 */
gppsb_switching_small_not_trival.patch
Description: gppsb_switching_small_not_trival.patch
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