On Tue, Jun 02, 2009 at 04:34:14PM +0200, Carl-Daniel Hailfinger wrote: > On 02.06.2009 16:13, Luc Verhaegen wrote: > > Board enable: Gigabyte GA K8N SLI. > > > > Raises bits 0 and 2 on offset 0xE1 in the system control area of the > > nvidia ck804 lpc. > > > > Signed-off-by: Luc Verhaegen <[email protected]> > > > > With the comment below addressed, this is > Acked-by: Carl-Daniel Hailfinger <[email protected]> > > > > Index: board_enable.c > > =================================================================== > > --- board_enable.c (revision 564) > > +++ board_enable.c (working copy) > > @@ -372,6 +372,31 @@ > > + base = pci_read_long(dev, 0x64) & 0xFFFFFF00; /* System control area */ > > > > base is an I/O port which is restricted to 16 bits on x86 compatible > platforms. Suggestion: > > base = pci_read_long(dev, 0x64) & 0x0000FF00; > > > Regards, > Carl-Daniel
Ok! Still waiting for alexander though, Luc Verhaegen. -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
