After I modify the pci_ext_read_config32 and pci_ext_read_config32, the step 6a
starts to play its role. Then the system hangs at HDA init. I dont know what the
VC1 is. The RPR says "Optional Features (only needed if CMOS option is enabled)"
in 5.10.2. Before I know what it is, I think it is better to skip it.

Tested on dbm690t.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>

--------------------

Index: src/southbridge/amd/rs690/rs690_pcie.c
===================================================================
--- src/southbridge/amd/rs690/rs690_pcie.c	(revision 4338)
+++ src/southbridge/amd/rs690/rs690_pcie.c	(working copy)
@@ -276,6 +276,7 @@
 	/* step 6a: VCI */
 	sb_dev = dev_find_slot(0, PCI_DEVFN(8, 0));
 	if (port == 8) {
+#if 0
 		/* Clear bits 7:1 */
 		pci_ext_write_config32(nb_dev, sb_dev, 0x114, 0x3f << 1, 0 << 1);
 		/* Maps Traffic Class 1-7 to VC1 */
@@ -284,7 +285,7 @@
 		pci_ext_write_config32(nb_dev, sb_dev, 0x120, 7 << 24, 1 << 24);
 		/* Enables VC1 */
 		pci_ext_write_config32(nb_dev, sb_dev, 0x120, 1 << 31, 1 << 31);
-#if 0
+
 		do {
 			reg16 = pci_ext_read_config32(nb_dev, sb_dev, 0x124);
 			reg16 &= 0x2;