Hi,
as promised, here's a follow-up to my mail from 2009-05-31. The patch
from back then (also reproduced here) breaks CBFS using boards, as
switching to CBFS requires some more changes now. The benefit is that
the normal image works again, which was broken with CBFS so far. The
patches here fix the breakage for the already transitioned boards.
20090531-use-coreboot.rom-for-cbfs: Change the CBFS build process to use
coreboot.rom instead of coreboot.strip, which fixes the calculation of
the entry point of the normal image. (same patch as in the old mail, and
Acked by myles)
20090605-3-fix-abuild-of-m2v-mx-se-with-crosscompiler: Properly use
CROSS_COMPILE, so abuild uses i386-elf-gcc as compiler if it needs to.
20090605-4-move-CONFIG_CBFS-to-Options-lb: hp/dl145_g3 defined
CONFIG_CBFS in the targets/* files, move to Options.lb like for every
other CBFS-using board
20090605-5-fix-via-vt8454c: Fix up via/vt8454c after the 20090531 patch
20090605-6-fix-kontron-986lcd-m: Likewise for kontron/986lcd-m
20090605-7-fix-emulation-qemu-x86: Likewise for emulation/qemu-x86
20090605-8-fix-hp-dl145-g3: Likewise for hp/dl145_g3
The 20090605-[5678]-* patches give some indication on how to switch a
board over to CBFS support. It's not as easy as without the 20090531
patch, but at least it works correctly then:
For targets that use the src/config/*calculation.lb files, it's quite easy:
1. define FALLBACK_SIZE to ROM_IMAGE_SIZE (both normal and fallback are
of that size now, that kludge can be dropped after non-CBFS is dropped)
2. drop most size definitions from the targets/*/*/Config*lb, except
ROM_SIZE (the total size of the image)
3. ROM_IMAGE_SIZE must be set to the intended size of the up-to-raminit
stage of coreboot (coreboot_ram is loaded from CBFS).
Usually, 64kb is enough, and choosing smaller values only makes
configuring the XIP range harder.
For boards with coreboot_apc image (AMD stuff mostly), you also have to
remove "ldscript /arch/i386/init/ldscript_apc.lb" from the mainboard's
Config.lb (not shown in this patch set, as none of these boards uses
it). coreboot_apc also resides in CBFS now, so this link hack in not
required anymore.
With this, I think CBFS has no regressions over the old style rom image
layout anymore, so moving everything over to using CBFS would be a nice
next step, as lots of stuff in the build system could disappear after that.
Regards,
Patrick
Index: src/config/nofailovercalculation.lb
===================================================================
--- src/config/nofailovercalculation.lb.orig
+++ src/config/nofailovercalculation.lb
@@ -6,8 +6,13 @@ if USE_FALLBACK_IMAGE
default ROM_SECTION_SIZE = FALLBACK_SIZE
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
else
- default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
- default ROM_SECTION_OFFSET = 0
+ if CONFIG_CBFS
+ default ROM_SECTION_SIZE = FALLBACK_SIZE
+ default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE -
FALLBACK_SIZE )
+ else
+ default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
+ default ROM_SECTION_OFFSET = 0
+ end
end
##
Index: src/config/failovercalculation.lb
===================================================================
--- src/config/failovercalculation.lb.orig
+++ src/config/failovercalculation.lb
@@ -10,8 +10,13 @@ else
default ROM_SECTION_SIZE = FALLBACK_SIZE
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE
)
else
- default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE
)
- default ROM_SECTION_OFFSET = 0
+ if CONFIG_CBFS
+ default ROM_SECTION_SIZE = FALLBACK_SIZE
+ default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE -
FALLBACK_SIZE - FAILOVER_SIZE )
+ else
+ default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE -
FAILOVER_SIZE )
+ default ROM_SECTION_OFFSET = 0
+ end
end
end
Index: src/config/nofailovercalculation128.lb
===================================================================
--- src/config/nofailovercalculation128.lb.orig
+++ src/config/nofailovercalculation128.lb
@@ -6,8 +6,13 @@ if USE_FALLBACK_IMAGE
default ROM_SECTION_SIZE = FALLBACK_SIZE
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
else
- default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
- default ROM_SECTION_OFFSET = 0
+ if CONFIG_CBFS
+ default ROM_SECTION_SIZE = FALLBACK_SIZE
+ default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE -
FALLBACK_SIZE )
+ else
+ default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
+ default ROM_SECTION_OFFSET = 0
+ end
end
##
Index: util/newconfig/config.g
===================================================================
--- util/newconfig/config.g.orig
+++ util/newconfig/config.g
@@ -2293,7 +2293,7 @@ def writemakefile(path):
# build the bootblock here.
file.write("\n\tcat")
for j in i.roms:
- file.write(" %s/coreboot.strip " % j)
+ file.write(" %s/coreboot.rom " % j)
file.write("> %s.bootblock\n\n" %i.name)
file.write("\t./cbfstool %s create %s %s %s.bootblock\n"
%(i.name, romsize, bootblocksize, i.name))
Index: targets/asus/m2v-mx_se/Config-abuild.lb
===================================================================
--- targets/asus/m2v-mx_se/Config-abuild.lb (revision 4340)
+++ targets/asus/m2v-mx_se/Config-abuild.lb (working copy)
@@ -20,6 +20,10 @@
target asus_m2v-mx_se
mainboard asus/m2v-mx_se
+option CC="CROSSCC"
+option CROSS_COMPILE="CROSS_PREFIX"
+option HOSTCC="CROSS_HOSTCC"
+
## ROM_SIZE is the total number of bytes allocated for coreboot use
## (normal AND fallback images and payloads).
Index: src/mainboard/hp/dl145_g3/Options.lb
===================================================================
--- src/mainboard/hp/dl145_g3/Options.lb.orig
+++ src/mainboard/hp/dl145_g3/Options.lb
@@ -329,5 +329,9 @@ default MAXIMUM_CONSOLE_LOGLEVEL=8
## Select power on after power fail setting
default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
+##
+## CBFS
+default CONFIG_CBFS=1
+
### End Options.lb
end
Index: targets/hp/dl145_g3/Config-abuild.lb
===================================================================
--- targets/hp/dl145_g3/Config-abuild.lb.orig
+++ targets/hp/dl145_g3/Config-abuild.lb
@@ -13,8 +13,6 @@ __LOGLEVEL__
option ROM_SIZE=1024*(1024-32)
option FALLBACK_SIZE=1024*512
-option CONFIG_CBFS = 1
-
romimage "fallback"
option USE_FALLBACK_IMAGE=1
option ROM_IMAGE_SIZE=0x20000
Index: targets/hp/dl145_g3/Config.lb
===================================================================
--- targets/hp/dl145_g3/Config.lb.orig
+++ targets/hp/dl145_g3/Config.lb
@@ -25,7 +25,6 @@ target dl145_g3
mainboard hp/dl145_g3
option ROM_SIZE= 1024*1024
-option CONFIG_CBFS = 1
romimage "fallback"
option USE_FALLBACK_IMAGE=1
Index: src/mainboard/via/vt8454c/Options.lb
===================================================================
--- src/mainboard/via/vt8454c/Options.lb (revision 4340)
+++ src/mainboard/via/vt8454c/Options.lb (working copy)
@@ -158,7 +158,7 @@
## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
default ROM_IMAGE_SIZE = 65536
-default FALLBACK_SIZE = 131072
+default FALLBACK_SIZE = ROM_IMAGE_SIZE
##
## Use a small 8K stack
Index: targets/via/vt8454c/Config-abuild.lb
===================================================================
--- targets/via/vt8454c/Config-abuild.lb (revision 4340)
+++ targets/via/vt8454c/Config-abuild.lb (working copy)
@@ -29,14 +29,12 @@
option HOSTCC="CROSS_HOSTCC"
option ROM_SIZE=512*1024
-option FALLBACK_SIZE=512*1024
__COMPRESSION__
__LOGLEVEL__
romimage "fallback"
option USE_FALLBACK_IMAGE=1
- option ROM_IMAGE_SIZE=0x15000
option COREBOOT_EXTRA_VERSION=".0-fallback"
payload __PAYLOAD__
end
Index: targets/via/vt8454c/Config.lb
===================================================================
--- targets/via/vt8454c/Config.lb (revision 4340)
+++ targets/via/vt8454c/Config.lb (working copy)
@@ -30,14 +30,12 @@
romimage "normal"
option USE_FALLBACK_IMAGE=0
- option ROM_IMAGE_SIZE=0x14000
option COREBOOT_EXTRA_VERSION=".0-normal"
payload $(HOME)/payload.elf
end
romimage "fallback"
option USE_FALLBACK_IMAGE=1
- option ROM_IMAGE_SIZE=0x14000
option COREBOOT_EXTRA_VERSION=".0-fallback"
payload $(HOME)/payload.elf
end
Index: src/mainboard/kontron/986lcd-m/Options.lb
===================================================================
--- src/mainboard/kontron/986lcd-m/Options.lb (revision 4340)
+++ src/mainboard/kontron/986lcd-m/Options.lb (working copy)
@@ -249,7 +249,7 @@
### Compute the location and size of where this firmware image
### (coreboot plus bootloader) will live in the boot rom chip.
###
-default FALLBACK_SIZE=131072
+default FALLBACK_SIZE=ROM_IMAGE_SIZE
##
## coreboot C code runs at this location in RAM
Index: targets/kontron/986lcd-m/Config-abuild.lb
===================================================================
--- targets/kontron/986lcd-m/Config-abuild.lb (revision 4340)
+++ targets/kontron/986lcd-m/Config-abuild.lb (working copy)
@@ -11,18 +11,15 @@
__LOGLEVEL__
option ROM_SIZE=1024*1024
-option FALLBACK_SIZE=1024*64
romimage "normal"
option USE_FALLBACK_IMAGE=0
- option ROM_IMAGE_SIZE=0x10000
option COREBOOT_EXTRA_VERSION=".0-normal"
payload __PAYLOAD__
end
romimage "fallback"
option USE_FALLBACK_IMAGE=1
- option ROM_IMAGE_SIZE=0x10000
option COREBOOT_EXTRA_VERSION=".0-fallback"
payload __PAYLOAD__
end
Index: targets/kontron/986lcd-m/Config.lb
===================================================================
--- targets/kontron/986lcd-m/Config.lb (revision 4340)
+++ targets/kontron/986lcd-m/Config.lb (working copy)
@@ -5,20 +5,8 @@
## (normal AND fallback images and payloads).
option ROM_SIZE = 1024 * 1024
-# Use this line instead if you want to use onboard VGA:
-# option ROM_SIZE = (1024 * 1024) - (64 * 1024)
-
-## ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image,
-## not including any payload.
-option ROM_IMAGE_SIZE = 128 * 1024
-
-## FALLBACK_SIZE is the amount of the ROM the complete fallback image
-## (including payload) will use.
-option FALLBACK_SIZE = ROM_SIZE
-
romimage "fallback"
option USE_FALLBACK_IMAGE = 1
- option ROM_IMAGE_SIZE = 144 * 1024
payload ../payload.elf
end
Index: src/mainboard/emulation/qemu-x86/Config.lb
===================================================================
--- src/mainboard/emulation/qemu-x86/Config.lb (revision 4340)
+++ src/mainboard/emulation/qemu-x86/Config.lb (working copy)
@@ -3,14 +3,14 @@
## (coreboot plus bootloader) will live in the boot rom chip.
##
default ROM_SIZE = 256 * 1024
-default ROM_SECTION_SIZE = ROM_SIZE
+default ROM_SECTION_SIZE = ROM_IMAGE_SIZE
default ROM_SECTION_OFFSET = 0
##
## Compute the start location and size size of
## The coreboot bootloader.
##
-default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
+default PAYLOAD_SIZE = ( ROM_SIZE - ROM_IMAGE_SIZE )
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET
+ 1)
##
Index: src/mainboard/emulation/qemu-x86/Options.lb
===================================================================
--- src/mainboard/emulation/qemu-x86/Options.lb (revision 4340)
+++ src/mainboard/emulation/qemu-x86/Options.lb (working copy)
@@ -100,7 +100,7 @@
## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
default ROM_IMAGE_SIZE = 65536
-default FALLBACK_SIZE = 131072
+default FALLBACK_SIZE = ROM_IMAGE_SIZE
##
## Use a small 8K stack
Index: targets/emulation/qemu-x86/Config-abuild.lb
===================================================================
--- targets/emulation/qemu-x86/Config-abuild.lb (revision 4340)
+++ targets/emulation/qemu-x86/Config-abuild.lb (working copy)
@@ -8,11 +8,8 @@
__COMPRESSION__
__LOGLEVEL__
-option ROM_SIZE=256*1024
-
romimage "fallback"
option USE_FALLBACK_IMAGE=1
- option ROM_IMAGE_SIZE=0x10000
option COREBOOT_EXTRA_VERSION=".0"
payload __PAYLOAD__
end
Index: targets/emulation/qemu-x86/Config.lb
===================================================================
--- targets/emulation/qemu-x86/Config.lb (revision 4340)
+++ targets/emulation/qemu-x86/Config.lb (working copy)
@@ -11,7 +11,6 @@
option IRQ_SLOT_COUNT=6
romimage "normal"
- option ROM_IMAGE_SIZE=0x10000
option COREBOOT_EXTRA_VERSION="-GRUB2"
# payload /home/stepan/core.img
payload ../payload.elf
Index: targets/emulation/qemu-x86/Config-lab.lb
===================================================================
--- targets/emulation/qemu-x86/Config-lab.lb (revision 4340)
+++ targets/emulation/qemu-x86/Config-lab.lb (working copy)
@@ -13,7 +13,6 @@
option IRQ_SLOT_COUNT=6
romimage "image"
- option ROM_IMAGE_SIZE=0x10000
option COREBOOT_EXTRA_VERSION="-LAB"
payload ../payload.elf.lzma
end
Index: targets/emulation/qemu-x86/Config.OLPC.lb
===================================================================
--- targets/emulation/qemu-x86/Config.OLPC.lb (revision 4340)
+++ targets/emulation/qemu-x86/Config.OLPC.lb (working copy)
@@ -13,7 +13,6 @@
option IRQ_SLOT_COUNT=6
romimage "image"
- option ROM_IMAGE_SIZE=0x10000
option COREBOOT_EXTRA_VERSION="-OpenBIOS"
payload /tmp/olpcpayload.elf
end
Index: src/mainboard/hp/dl145_g3/Options.lb
===================================================================
--- src/mainboard/hp/dl145_g3/Options.lb.orig
+++ src/mainboard/hp/dl145_g3/Options.lb
@@ -121,9 +121,7 @@ default ROM_SIZE=524288
##
## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
##
-#default FALLBACK_SIZE=131072
-#256K
-default FALLBACK_SIZE=0x40000
+default FALLBACK_SIZE=ROM_IMAGE_SIZE
#more 1M for pgtbl
default CONFIG_LB_MEM_TOPK=2048
Index: targets/hp/dl145_g3/Config-abuild.lb
===================================================================
--- targets/hp/dl145_g3/Config-abuild.lb.orig
+++ targets/hp/dl145_g3/Config-abuild.lb
@@ -11,11 +11,9 @@ __COMPRESSION__
__LOGLEVEL__
option ROM_SIZE=1024*(1024-32)
-option FALLBACK_SIZE=1024*512
romimage "fallback"
option USE_FALLBACK_IMAGE=1
- option ROM_IMAGE_SIZE=0x20000
option XIP_ROM_SIZE=0x20000
option COREBOOT_EXTRA_VERSION=".0-fallback"
payload __PAYLOAD__
Index: targets/hp/dl145_g3/Config.lb
===================================================================
--- targets/hp/dl145_g3/Config.lb.orig
+++ targets/hp/dl145_g3/Config.lb
@@ -28,7 +28,6 @@ option ROM_SIZE= 1024*1024
romimage "fallback"
option USE_FALLBACK_IMAGE=1
- option ROM_IMAGE_SIZE=0x20000
option XIP_ROM_SIZE=0x20000
option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback"
payload ./bios.bin.elf
--
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