On 02.06.2009 01:19, Carl-Daniel Hailfinger wrote: > Every SPI host controller implemented its own way to read flash chips. > This was partly due to a design problem in the abstraction layer. > > There should be exactly two different functions for reading SPI chips: > - memory mapped reads > - SPI command reads. > > Each of them should be contained in a separate function, optionally > taking parameters where needed. > > This patch solves the problems mentioned above, shortens the code and > makes the code logic a lot more obvious. > > Since open-coding the min() function leads to errors, include it in this > patch as well. > > Signed-off-by: Carl-Daniel Hailfinger <[email protected]> >
Ron pointed out that I should not only explain what a patch does, but also why we need it. Once this patch is merged, we get partial read support practically for free. Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
