Here's an updated patch which adds a Mitac 6513WU board enable with autodetection.
Signed-off-by: Michael Gold <[email protected]> --- I've also attached the lspci output. Why do you think coreboot support is unlikely? Is 82810E support a problem? -- Michael
Index: util/flashrom/board_enable.c
===================================================================
--- util/flashrom/board_enable.c (revision 606)
+++ util/flashrom/board_enable.c (working copy)
@@ -693,6 +693,73 @@
}
/**
+ * Find the runtime registers of an SMSC Super I/O, after verifying its
+ * chip ID.
+ *
+ * Returns the base port of the runtime register block, or 0 on error.
+ */
+static uint16_t smsc_find_runtime(uint16_t sio_port, uint16_t chip_id,
+ uint8_t logical_device)
+{
+ uint16_t rt_port = 0;
+
+ /* Verify the chip ID. */
+ OUTB(0x55, sio_port); /* enable configuration */
+ if (sio_read(sio_port, 0x20) != chip_id) {
+ fprintf(stderr, "\nERROR: SMSC super I/O not found.\n");
+ goto out;
+ }
+
+ /* If the runtime block is active, get its address. */
+ sio_write(sio_port, 0x07, logical_device);
+ if (sio_read(sio_port, 0x30) & 1) {
+ rt_port = (sio_read(sio_port, 0x60) << 8)
+ | sio_read(sio_port, 0x61);
+ }
+
+ if (rt_port == 0) {
+ fprintf(stderr, "\nERROR: "
+ "Super I/O runtime interface not available.\n");
+ }
+out:
+ OUTB(0xaa, sio_port); /* disable configuration */
+ return rt_port;
+}
+
+/**
+ * Disable write protection on the Mitac 6513WU. WP# on the FWH is
+ * connected to GP30 on the Super I/O, and TBL# is always high.
+ */
+static int board_mitac_6513wu(const char *name)
+{
+ struct pci_dev *dev;
+ uint16_t rt_port;
+ uint8_t val;
+
+ dev = pci_dev_find(0x8086, 0x2410); /* Intel 82801AA ISA bridge */
+ if (!dev) {
+ fprintf(stderr, "\nERROR: Intel 82801AA ISA bridge not found.\n");
+ return -1;
+ }
+
+ rt_port = smsc_find_runtime(0x4e, 0x54, 0xa);
+ if (rt_port == 0)
+ return -1;
+
+ /* Configure the GPIO pin. */
+ val = INB(rt_port + 0x33); /* GP30 config */
+ val &= ~0x87; /* output, non-inverted, GPIO, push/pull */
+ OUTB(val, rt_port + 0x33);
+
+ /* Disable write protection. */
+ val = INB(rt_port + 0x4d); /* GP3 values */
+ val |= 0x01; /* set GP30 high */
+ OUTB(val, rt_port + 0x4d);
+
+ return 0;
+}
+
+/**
* We use 2 sets of IDs here, you're free to choose which is which. This
* is to provide a very high degree of certainty when matching a board on
* the basis of subsystem/card IDs. As not every vendor handles
@@ -742,6 +809,7 @@
/* Note: There are >= 2 version of the Kontron 986LCD-M/mITX! */
{0x8086, 0x27b8, 0, 0, 0, 0, 0, 0, "kontron", "986lcd-m", "Kontron", "986LCD-M", board_kontron_986lcd_m},
{0x10ec, 0x8168, 0x10ec, 0x8168, 0x104c, 0x8023, 0x104c, 0x8019, "kontron", "986lcd-m", "Kontron", "986LCD-M", board_kontron_986lcd_m},
+ {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, "Mitac", "6513WU", board_mitac_6513wu},
{0x10de, 0x005e, 0, 0, 0, 0, 0, 0, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", w83627thf_gpio4_4_raise_4e},
{0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)",w83627thf_gpio4_4_raise_2e},
{0x1106, 0x0571, 0x1462, 0x7120, 0, 0, 0, 0, "msi", "kt4v", "MSI", "MS-6712 (KT4V)", board_msi_kt4v},
00:00.0 0600: 8086:7124 (rev 03)
Flags: bus master, fast devsel, latency 0
Kernel driver in use: agpgart-intel
Kernel modules: intel-agp
00:01.0 0300: 8086:7125 (rev 03) (prog-if 00 [VGA controller])
Subsystem: 0e11:b165
Flags: bus master, 66MHz, medium devsel, latency 0, IRQ 3
Memory at 44000000 (32-bit, prefetchable) [size=64M]
Memory at 40100000 (32-bit, non-prefetchable) [size=512K]
Capabilities: [dc] Power Management version 1
Kernel modules: i2c-i810
00:1e.0 0604: 8086:2418 (rev 02) (prog-if 00 [Normal decode])
Flags: bus master, fast devsel, latency 0
Bus: primary=00, secondary=01, subordinate=01, sec-latency=64
I/O behind bridge: 00001000-00001fff
Memory behind bridge: 40000000-400fffff
Kernel modules: shpchp
00:1f.0 0601: 8086:2410 (rev 02)
Flags: bus master, medium devsel, latency 0
Kernel modules: iTCO_wdt, intel-rng
00:1f.1 0101: 8086:2411 (rev 02) (prog-if 80 [Master])
Subsystem: 8086:2411
Flags: bus master, medium devsel, latency 0
[virtual] Memory at 000001f0 (32-bit, non-prefetchable) [disabled]
[size=8]
[virtual] Memory at 000003f0 (type 3, non-prefetchable) [disabled]
[size=1]
[virtual] Memory at 00000170 (32-bit, non-prefetchable) [disabled]
[size=8]
[virtual] Memory at 00000370 (type 3, non-prefetchable) [disabled]
[size=1]
I/O ports at 2020 [size=16]
Kernel driver in use: PIIX_IDE
Kernel modules: piix
00:1f.2 0c03: 8086:2412 (rev 02) (prog-if 00 [UHCI])
Subsystem: 8086:2412
Flags: bus master, medium devsel, latency 0, IRQ 11
I/O ports at eec0 [size=32]
Kernel driver in use: uhci_hcd
Kernel modules: uhci-hcd
00:1f.3 0c05: 8086:2413 (rev 02)
Subsystem: 8086:2413
Flags: medium devsel, IRQ 5
I/O ports at eee0 [size=16]
Kernel driver in use: i801_smbus
Kernel modules: i2c-i801
01:05.0 0401: 125d:1988 (rev 10)
Subsystem: 0e11:b19d
Flags: medium devsel, IRQ 5
I/O ports at 1000 [size=256]
Capabilities: [c0] Power Management version 2
Kernel modules: snd-maestro3
01:09.0 0200: 1022:2001 (rev 51)
Subsystem: 1092:0a82
Flags: bus master, medium devsel, latency 66, IRQ 5
I/O ports at 1440 [size=32]
Memory at 40000000 (32-bit, non-prefetchable) [size=32]
Capabilities: [40] Power Management version 1
Kernel driver in use: pcnet32
Kernel modules: pcnet32
01:0a.0 0703: 134d:7897 (rev 02) (prog-if 01 [Hayes/16450])
Subsystem: 134d:0001
Flags: medium devsel, IRQ 11
I/O ports at 1400 [size=64]
Capabilities: [40] Power Management version 2
Kernel driver in use: serial
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