On Thu, Jun 18, 2009 at 01:54:32PM +0200, Uwe Hermann wrote: > On Thu, Jun 18, 2009 at 02:47:33AM +0200, Luc Verhaegen wrote: > > > Board enable for soyo sy-6ba+iii. > > > > This board enable drops GPO26 on the southbridge (PIIX4). Since there > > was another board raising GPO22 on the same southbridge, a general > > routine was created reducing both board enables to a single line. > > > > This routine does full gpo pin checking and filters out those which > > are most likely in use already, enables dual-function gpo pins properly, > > and then sets the relevant gpo line. It should be fully implemented for > > all gpo setting on PIIX4, except when a supposed used gpo pin does happen > > to be available for gpio. > > > > The board itself predates proper subsystem id usage and can therefor not > > be autodetected. > > > > Signed-off-by: Luc Verhaegen <[email protected]> > > With the changes below: > Acked-by: Uwe Hermann <[email protected]>
Sadly, we then found out on irc that this was not needed. I should chase down the owner of the epox board and see wether he can test this. Thanks for the thorough review though, i hope the main function can still make it in. > Nice! > > This also makes the board_epox_ep_bx3() more generic, as the 0x4036 > address might not always be 0x4036 if $SOMETHING (BIOS? OS?) decide?? > to map it elsewhere, correct? Yup, it is a bios decision, so it could be that 0x4000 never moves, but other boards can then also use this board enable when they raise the same pin. Luc Verhaegen. -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
