On Saturday 20 June 2009 15:36:13 Rudolf Marek wrote: > Hello, > > The namestring handling in ACPIgen was a big trickery. We were pasing the > strings as it was a bytestream already. This was a reason for instead of > _PR one had to write _PR_ > > Or \_SB.PCI0 was in fact \_SB_PCI0. > > This patch adds a proper namestring generation to our ACPIgen generator. > Its used for Name and Scope and Processor now. As bonus, it allows to > create a multi name paths too. Like Scope(\ALL.YOUR.BASE). > > Signed-off-by: Rudolf Marek <[email protected]> Acked-by: Harald Gutmann <[email protected]>
I didn't review the whole patch, but it seems to be fine. The tests I did on hardware went all like they should. > I have no board now, so I cannot test it on real HW. I did some tests which > a ACPIgen testbench which I'm attaching for future reference. I've tested this patch on M57SLI. The SSDT.dsl tables from a plain cb-v2 rev. 4367 and the same rev. with this patch are attached. PowerNow remains working, like it should, and there are no differences after patching cb in the SSDT.dsl tables. > I dont know what happen to fam10 code, but I think it will need similar > change. > > Rudolf Regards, Harald
/*
* Intel ACPI Component Architecture
* AML Disassembler version 20090521
*
* Disassembly of SSDT.dat, Sun Jun 21 21:21:55 2009
*
*
* Original Table Header:
* Signature "SSDT"
* Length 0x00000402 (1026)
* Revision 0x02
* Checksum 0xF2
* OEM ID "CORE "
* OEM Table ID "DYNADATA"
* OEM Revision 0x0000002A (42)
* Compiler ID "GENA"
* Compiler Version 0x0000002A (42)
*/
DefinitionBlock ("SSDT.aml", "SSDT", 2, "CORE ", "DYNADATA", 0x0000002A)
{
External (\_SB_.PCI0, DeviceObj)
Scope (\_SB.PCI0)
{
Name (BUSN, Package (0x04)
{
0x07000003,
0x00000000,
0x00000000,
0x00000000
})
Name (PCIO, Package (0x08)
{
0x00001013,
0x00004000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000
})
Name (MMIO, Package (0x10)
{
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000A03,
0x00000B00,
0x00F40003,
0x00F62F00,
0x00E00003,
0x00EFFF00
})
Name (SBLK, 0x00)
Name (CBST, 0x00)
Name (SBDN, 0x00000000)
Name (TOM1, 0xC0000000)
Name (TOM2, 0x0000000140000000)
Name (HCLK, Package (0x08)
{
0x07000001,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000
})
Name (HCDN, Package (0x08)
{
0x20202000,
0x20202020,
0x20202020,
0x20202020,
0x20202020,
0x20202020,
0x20202020,
0x20202020
})
}
Scope (\_PR)
{
Processor (\_PR.CPU0, 0x00, 0x00000000, 0x00)
{
Name (_PCT, Package (0x02)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
}
})
Name (_PSS, Package (0x07)
{
Package (0x06)
{
0x00000BB8,
0x0001E848,
0x00000064,
0x00000007,
0xE8202996,
0x00000196
},
Package (0x06)
{
0x00000AF0,
0x00062404,
0x00000064,
0x00000007,
0xE8202A14,
0x00000214
},
Package (0x06)
{
0x00000A28,
0x0005499A,
0x00000064,
0x00000007,
0xE8202A92,
0x00000292
},
Package (0x06)
{
0x00000960,
0x00048337,
0x00000064,
0x00000007,
0xE8202B10,
0x00000310
},
Package (0x06)
{
0x00000898,
0x0003CFED,
0x00000064,
0x00000007,
0xE8202B8E,
0x0000038E
},
Package (0x06)
{
0x000007D0,
0x00032ECF,
0x00000064,
0x00000007,
0xE8202C0C,
0x0000040C
},
Package (0x06)
{
0x000003E8,
0x000174BF,
0x00000064,
0x00000007,
0xE8202C82,
0x00000482
}
})
Method (_PPC, 0, NotSerialized)
{
Return (0x07)
}
}
Processor (\_PR.CPU1, 0x01, 0x00000000, 0x00)
{
Name (_PCT, Package (0x02)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
}
})
Name (_PSS, Package (0x07)
{
Package (0x06)
{
0x00000BB8,
0x0001E848,
0x00000064,
0x00000007,
0xE8202996,
0x00000196
},
Package (0x06)
{
0x00000AF0,
0x00062404,
0x00000064,
0x00000007,
0xE8202A14,
0x00000214
},
Package (0x06)
{
0x00000A28,
0x0005499A,
0x00000064,
0x00000007,
0xE8202A92,
0x00000292
},
Package (0x06)
{
0x00000960,
0x00048337,
0x00000064,
0x00000007,
0xE8202B10,
0x00000310
},
Package (0x06)
{
0x00000898,
0x0003CFED,
0x00000064,
0x00000007,
0xE8202B8E,
0x0000038E
},
Package (0x06)
{
0x000007D0,
0x00032ECF,
0x00000064,
0x00000007,
0xE8202C0C,
0x0000040C
},
Package (0x06)
{
0x000003E8,
0x000174BF,
0x00000064,
0x00000007,
0xE8202C82,
0x00000482
}
})
Method (_PPC, 0, NotSerialized)
{
Return (0x07)
}
}
}
}
/*
* Intel ACPI Component Architecture
* AML Disassembler version 20090521
*
* Disassembly of SSDT.dat, Sun Jun 21 22:04:06 2009
*
*
* Original Table Header:
* Signature "SSDT"
* Length 0x00000402 (1026)
* Revision 0x02
* Checksum 0xF2
* OEM ID "CORE "
* OEM Table ID "DYNADATA"
* OEM Revision 0x0000002A (42)
* Compiler ID "GENA"
* Compiler Version 0x0000002A (42)
*/
DefinitionBlock ("SSDT.aml", "SSDT", 2, "CORE ", "DYNADATA", 0x0000002A)
{
External (\_SB_.PCI0, DeviceObj)
Scope (\_SB.PCI0)
{
Name (BUSN, Package (0x04)
{
0x07000003,
0x00000000,
0x00000000,
0x00000000
})
Name (PCIO, Package (0x08)
{
0x00001013,
0x00004000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000
})
Name (MMIO, Package (0x10)
{
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000A03,
0x00000B00,
0x00F40003,
0x00F62F00,
0x00E00003,
0x00EFFF00
})
Name (SBLK, 0x00)
Name (CBST, 0x00)
Name (SBDN, 0x00000000)
Name (TOM1, 0xC0000000)
Name (TOM2, 0x0000000140000000)
Name (HCLK, Package (0x08)
{
0x07000001,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000
})
Name (HCDN, Package (0x08)
{
0x20202000,
0x20202020,
0x20202020,
0x20202020,
0x20202020,
0x20202020,
0x20202020,
0x20202020
})
}
Scope (\_PR)
{
Processor (\_PR.CPU0, 0x00, 0x00000000, 0x00)
{
Name (_PCT, Package (0x02)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
}
})
Name (_PSS, Package (0x07)
{
Package (0x06)
{
0x00000BB8,
0x0001E848,
0x00000064,
0x00000007,
0xE8202996,
0x00000196
},
Package (0x06)
{
0x00000AF0,
0x00062404,
0x00000064,
0x00000007,
0xE8202A14,
0x00000214
},
Package (0x06)
{
0x00000A28,
0x0005499A,
0x00000064,
0x00000007,
0xE8202A92,
0x00000292
},
Package (0x06)
{
0x00000960,
0x00048337,
0x00000064,
0x00000007,
0xE8202B10,
0x00000310
},
Package (0x06)
{
0x00000898,
0x0003CFED,
0x00000064,
0x00000007,
0xE8202B8E,
0x0000038E
},
Package (0x06)
{
0x000007D0,
0x00032ECF,
0x00000064,
0x00000007,
0xE8202C0C,
0x0000040C
},
Package (0x06)
{
0x000003E8,
0x000174BF,
0x00000064,
0x00000007,
0xE8202C82,
0x00000482
}
})
Method (_PPC, 0, NotSerialized)
{
Return (0x07)
}
}
Processor (\_PR.CPU1, 0x01, 0x00000000, 0x00)
{
Name (_PCT, Package (0x02)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
}
})
Name (_PSS, Package (0x07)
{
Package (0x06)
{
0x00000BB8,
0x0001E848,
0x00000064,
0x00000007,
0xE8202996,
0x00000196
},
Package (0x06)
{
0x00000AF0,
0x00062404,
0x00000064,
0x00000007,
0xE8202A14,
0x00000214
},
Package (0x06)
{
0x00000A28,
0x0005499A,
0x00000064,
0x00000007,
0xE8202A92,
0x00000292
},
Package (0x06)
{
0x00000960,
0x00048337,
0x00000064,
0x00000007,
0xE8202B10,
0x00000310
},
Package (0x06)
{
0x00000898,
0x0003CFED,
0x00000064,
0x00000007,
0xE8202B8E,
0x0000038E
},
Package (0x06)
{
0x000007D0,
0x00032ECF,
0x00000064,
0x00000007,
0xE8202C0C,
0x0000040C
},
Package (0x06)
{
0x000003E8,
0x000174BF,
0x00000064,
0x00000007,
0xE8202C82,
0x00000482
}
})
Method (_PPC, 0, NotSerialized)
{
Return (0x07)
}
}
}
}
signature.asc
Description: This is a digitally signed message part.
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