Hi,
I have some issues with an Fam10h board here. Every once in a while,
boot fails with "FIXME! CPU Version unknown or not supported!". The CPU
Version mask that is calculated at the location the patch changes is
0x10efff. This value appears if the result of the cpuid call (or NB
probe) is 0xffffff (the highest 8 bits aren't counted in, it might be
0xffffffff, too)
Attached patch fixes the issue for me by retrying until a valid value is
returned, which indicates that this might be a timing or concurrency
issue.
I'd appreciate if someone with more knowledge of the AMD code could look
into this, as this potentially endless loop is not a real fix.
Patrick
Index: dSPACE/src/northbridge/amd/amdfam10/raminit_amdmct.c
===================================================================
--- dSPACE.orig/src/northbridge/amd/amdfam10/raminit_amdmct.c 2009-08-25 13:53:55.254059607 +0200
+++ dSPACE/src/northbridge/amd/amdfam10/raminit_amdmct.c 2009-08-25 13:55:44.954075039 +0200
@@ -109,17 +109,24 @@
/* FIXME: Move this to a more generic place. Maybe to the CPU code */
/* Converts the CPUID to a logical ID MASK that is used to check
CPU version support versions */
- u32 dev;
u32 val, valx;
u32 family, model, stepping;
u32 ret;
+ {
if (Node == 0xFF) { /* current node */
val = cpuid_eax(0x80000001);
} else {
+ u32 dev;
dev = PA_NBMISC(Node);
val = Get_NB32(dev, 0xfc);
}
+ print_err("value found: ");
+ print_err_hex32(val);
+ print_err(" with node: ");
+ print_err_hex32(Node);
+ print_err("\n");
+ } while ((val & 0xffffff) == 0xffffff);
family = ((val >> 8) & 0x0f) + ((val >> 20) & 0xff);
model = ((val >> 4) & 0x0f) | ((val >> (16-4)) & 0xf0);
@@ -164,6 +171,7 @@
default:
/* FIXME: mabe we should die() here. */
print_err("FIXME! CPU Version unknown or not supported! \n");
+ print_err_hex32(valx);
ret = 0;
}
--
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