The big_bootblock patch fixes building but breaks booting. It is only
for seeing what needs to be fixed with fam10 boards.
fam10.diff makes serengeti_cheetah_fam10 build with a broken
bootblock, and updates lots of Kconfig variables.
Signed-off-by: Myles Watson <[email protected]>
Thanks,
Myles
Index: svn/src/arch/i386/init/ldscript_fallback_cbfs.lb
===================================================================
--- svn.orig/src/arch/i386/init/ldscript_fallback_cbfs.lb
+++ svn/src/arch/i386/init/ldscript_fallback_cbfs.lb
@@ -36,9 +36,9 @@ SECTIONS
{
. = CONFIG_ROMBASE;
- /* cut _start into last 64k*/
+ /* cut _start into last 128k*/
_x = .;
- . = (_x < (CONFIG_ROMBASE - 0x10000 + CONFIG_ROM_IMAGE_SIZE)) ? (CONFIG_ROMBASE - 0x10000 + CONFIG_ROM_IMAGE_SIZE) : _x;
+ . = (_x < (CONFIG_ROMBASE - CONFIG_BOOTBLOCK_SIZE + CONFIG_ROM_IMAGE_SIZE)) ? (CONFIG_ROMBASE - CONFIG_BOOTBLOCK_SIZE + CONFIG_ROM_IMAGE_SIZE) : _x;
/* This section might be better named .setup */
.rom . : {
Index: svn/src/arch/i386/Kconfig
===================================================================
--- svn.orig/src/arch/i386/Kconfig
+++ svn/src/arch/i386/Kconfig
@@ -36,6 +36,10 @@ config ROM_IMAGE_SIZE
default 0x40000 if COREBOOT_ROMSIZE_KB_256
default 0x20000 if COREBOOT_ROMSIZE_KB_128
+config BOOTBLOCK_SIZE
+ hex
+ default 0x10000
+
config RAMBASE
hex
default 0x100000
Index: svn/src/cpu/x86/16bit/reset16.lds
===================================================================
--- svn.orig/src/cpu/x86/16bit/reset16.lds
+++ svn/src/cpu/x86/16bit/reset16.lds
@@ -5,7 +5,7 @@
SECTIONS {
/* Trigger an error if I have an unuseable start address */
- _bogus = ASSERT(_start >= 0xffff0000, "_start too low. Please decrease CONFIG_ROM_IMAGE_SIZE");
+ _bogus = ASSERT(_start >= (0xffffffff - CONFIG_BOOTBLOCK_SIZE + 1), "_start too low. Please decrease CONFIG_ROM_IMAGE_SIZE");
_ROMTOP = 0xfffffff0;
. = _ROMTOP;
.reset . : {
Index: svn/src/cpu/amd/socket_F_1207/Makefile.inc
===================================================================
--- svn.orig/src/cpu/amd/socket_F_1207/Makefile.inc
+++ svn/src/cpu/amd/socket_F_1207/Makefile.inc
@@ -10,5 +10,6 @@ subdirs-y += ../../x86/mmx
subdirs-y += ../../x86/sse
subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/pae
subdirs-y += ../../x86/smm
Index: svn/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
===================================================================
--- svn.orig/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
+++ svn/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
@@ -13,9 +13,8 @@ config BOARD_AMD_SERENGETI_CHEETAH_FAM10
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select IOAPIC
- select AP_CODE_IN_CAR
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
- select WAIT_BEFORE_CPUS_INIT
+ select SERIAL_CPU_INIT
select AMDMCT
config MAINBOARD_DIR
@@ -23,24 +22,9 @@ config MAINBOARD_DIR
default amd/serengeti_cheetah_fam10
depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
-config DCACHE_RAM_BASE
- hex
- default 0xc8000
- depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
-
-config DCACHE_RAM_SIZE
- hex
- default 0x08000
- depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
- hex
- default 0x01000
- depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
-
config APIC_ID_OFFSET
hex
- default 0x8
+ default 0x0
depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
config LB_CKS_RANGE_END
@@ -99,11 +83,6 @@ config USE_INIT
default n
depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
-config SERIAL_CPU_INIT
- bool
- default n
- depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
-
config IRQ_SLOT_COUNT
int
default 11
@@ -114,3 +93,47 @@ config AMD_UCODE_PATCH_FILE
default "mc_patch_01000095.h"
depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+config BOOTBLOCK_SIZE
+ hex
+ default 0x18000
+ depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config LB_MEM_TOPK
+ hex
+ default 0x4000
+ depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config HEAP_SIZE
+ hex
+ default 0xc0000
+ depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config ACPI_SSDTX_NUM
+ int
+ default 31
+ depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config MEM_TRAIN_SEQ
+ int
+ default 2
+ depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
+ hex
+ default 0x2b80
+ depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
+ hex
+ default 0x1022
+ depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config ENABLE_APIC_EXT_ID
+ bool
+ default y
+ depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config LIFT_BSP_APIC_ID
+ bool
+ default y
+ depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
Index: svn/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
===================================================================
--- svn.orig/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
+++ svn/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
@@ -29,11 +29,11 @@ obj-$(CONFIG_HAVE_ACPI_TABLES) += dsdt.o
obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o
obj-$(CONFIG_HAVE_ACPI_TABLES) += fadt.o
-# ./ssdt.o is in northbridge/amd/amdk8/Config.lb
+# ./ssdt.o is in northbridge/amd/amdfam10/Makefile.inc
obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt2.o
obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt3.o
obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt4.o
-driver-y += ../../../drivers/i2c/i2cmux/i2cmux.o
+driver-y += ../../../drivers/i2c/i2cmux2/i2cmux2.o
# This is part of the conversion to init-obj and away from included code.
Index: svn/src/northbridge/amd/amdfam10/Makefile.inc
===================================================================
--- svn.orig/src/northbridge/amd/amdfam10/Makefile.inc
+++ svn/src/northbridge/amd/amdfam10/Makefile.inc
@@ -10,3 +10,36 @@ obj-$(CONFIG_HAVE_ACPI_TABLES) += sspr4.
obj-$(CONFIG_HAVE_ACPI_TABLES) += sspr5.o
obj-y += get_pci1234.o
+
+ifdef POST_EVALUATION
+$(obj)/northbridge/amd/amdfam10/ssdt.c: $(src)/northbridge/amd/amdfam10/ssdt.dsl
+ iasl -p $(CURDIR)/ssdt -tc $<
+ perl -pi -e 's/AmlCode/AmlCode_ssdt/g' ssdt.hex
+ mv ssdt.hex $@
+
+$(obj)/northbridge/amd/amdfam10/sspr1.c: $(src)/northbridge/amd/amdfam10/sspr1.dsl
+ iasl -p $(CURDIR)/sspr1 -tc $<
+ perl -pi -e 's/AmlCode/AmlCode_sspr1/g' sspr1.hex
+ mv sspr1.hex $@
+
+$(obj)/northbridge/amd/amdfam10/sspr2.c: $(src)/northbridge/amd/amdfam10/sspr2.dsl
+ iasl -p $(CURDIR)/sspr2 -tc $<
+ perl -pi -e 's/AmlCode/AmlCode_sspr2/g' sspr2.hex
+ mv sspr2.hex $@
+
+$(obj)/northbridge/amd/amdfam10/sspr3.c: $(src)/northbridge/amd/amdfam10/sspr3.dsl
+ iasl -p $(CURDIR)/sspr3 -tc $<
+ perl -pi -e 's/AmlCode/AmlCode_sspr3/g' sspr3.hex
+ mv sspr3.hex $@
+
+$(obj)/northbridge/amd/amdfam10/sspr4.c: $(src)/northbridge/amd/amdfam10/sspr4.dsl
+ iasl -p $(CURDIR)/sspr4 -tc $<
+ perl -pi -e 's/AmlCode/AmlCode_sspr4/g' sspr4.hex
+ mv sspr4.hex $@
+
+$(obj)/northbridge/amd/amdfam10/sspr5.c: $(src)/northbridge/amd/amdfam10/sspr5.dsl
+ iasl -p $(CURDIR)/sspr5 -tc $<
+ perl -pi -e 's/AmlCode/AmlCode_sspr5/g' sspr5.hex
+ mv sspr5.hex $@
+endif
+
Index: svn/src/Kconfig
===================================================================
--- svn.orig/src/Kconfig
+++ svn/src/Kconfig
@@ -135,8 +135,8 @@ config MMCONF_SUPPORT
default n
config LB_MEM_TOPK
- int
- default 2048
+ hex
+ default 0x800
config COMPRESSED_PAYLOAD_LZMA
bool
Index: svn/src/cpu/amd/Makefile.inc
===================================================================
--- svn.orig/src/cpu/amd/Makefile.inc
+++ svn/src/cpu/amd/Makefile.inc
@@ -1,4 +1,5 @@
subdirs-$(CONFIG_CPU_AMD_SOCKET_F) += socket_F
+subdirs-$(CONFIG_CPU_AMD_SOCKET_F_1207) += socket_F_1207
subdirs-$(CONFIG_CPU_AMD_SOCKET_754) += socket_754
subdirs-$(CONFIG_CPU_AMD_SOCKET_939) += socket_939
subdirs-$(CONFIG_CPU_AMD_SOCKET_940) += socket_940
Index: svn/src/cpu/amd/model_10xxx/Kconfig
===================================================================
--- svn.orig/src/cpu/amd/model_10xxx/Kconfig
+++ svn/src/cpu/amd/model_10xxx/Kconfig
@@ -28,16 +28,16 @@ config USE_DCACHE_RAM
config DCACHE_RAM_BASE
hex
- default 0xc8000
+ default 0xc4000
depends on CPU_AMD_MODEL_10XXX
config DCACHE_RAM_SIZE
hex
- default 0x08000
+ default 0x0c000
depends on CPU_AMD_MODEL_10XXX
config DCACHE_RAM_GLOBAL_VAR_SIZE
hex
- default 0x01000
+ default 0x04000
depends on CPU_AMD_MODEL_10XXX
Index: svn/src/cpu/amd/quadcore/Makefile.inc
===================================================================
--- /dev/null
+++ svn/src/cpu/amd/quadcore/Makefile.inc
@@ -0,0 +1 @@
+obj-y += amd_sibling.o
Index: svn/src/cpu/amd/socket_F_1207/Kconfig
===================================================================
--- svn.orig/src/cpu/amd/socket_F_1207/Kconfig
+++ svn/src/cpu/amd/socket_F_1207/Kconfig
@@ -35,10 +35,20 @@ config CAR_FAM10
config CBB
hex
- default 0xff
+ default 0x0
depends on CPU_AMD_SOCKET_F_1207
config CDB
hex
- default 0x0
+ default 0x18
+ depends on CPU_AMD_SOCKET_F_1207
+
+config XIP_ROM_BASE
+ hex
+ default 0xfff80000
+ depends on CPU_AMD_SOCKET_F_1207
+
+config XIP_ROM_SIZE
+ hex
+ default 0x80000
depends on CPU_AMD_SOCKET_F_1207
Index: svn/src/northbridge/amd/amdfam10/Kconfig
===================================================================
--- svn.orig/src/northbridge/amd/amdfam10/Kconfig
+++ svn/src/northbridge/amd/amdfam10/Kconfig
@@ -20,10 +20,16 @@
config NORTHBRIDGE_AMD_AMDFAM10
bool
select HAVE_HIGH_TABLES
+ select HYPERTRANSPORT_PLUGIN_SUPPORT
config AGP_APERTURE_SIZE
hex
default 0x4000000
depends on NORTHBRIDGE_AMD_AMDFAM10
+config HT3_SUPPORT
+ bool
+ default y
+ depends on NORTHBRIDGE_AMD_AMDFAM10
+
source src/northbridge/amd/amdfam10/root_complex/Kconfig
Index: svn/src/northbridge/amd/amdk8/Kconfig
===================================================================
--- svn.orig/src/northbridge/amd/amdk8/Kconfig
+++ svn/src/northbridge/amd/amdk8/Kconfig
@@ -20,6 +20,7 @@
config NORTHBRIDGE_AMD_AMDK8
bool
select HAVE_HIGH_TABLES
+ select HYPERTRANSPORT_PLUGIN_SUPPORT
config AGP_APERTURE_SIZE
hex
@@ -31,9 +32,4 @@ config K8_HT_FREQ_1G_SUPPORT
default n
depends on NORTHBRIDGE_AMD_AMDK8
-config HYPERTRANSPORT_PLUGIN_SUPPORT
- bool
- default y
- depends on NORTHBRIDGE_AMD_AMDK8
-
source src/northbridge/amd/amdk8/root_complex/Kconfig
--
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