Author: myles Date: 2009-10-13 00:39:08 +0200 (Tue, 13 Oct 2009) New Revision: 4762
Added: trunk/coreboot-v2/src/cpu/amd/quadcore/Makefile.inc Modified: trunk/coreboot-v2/src/Kconfig trunk/coreboot-v2/src/cpu/amd/Makefile.inc trunk/coreboot-v2/src/cpu/amd/model_10xxx/Kconfig trunk/coreboot-v2/src/cpu/amd/socket_F_1207/Kconfig trunk/coreboot-v2/src/cpu/amd/socket_F_1207/Makefile.inc trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc trunk/coreboot-v2/src/northbridge/amd/amdfam10/Kconfig trunk/coreboot-v2/src/northbridge/amd/amdfam10/Makefile.inc Log: Make fam10 build (but not boot due to bootblock size problems.) Signed-off-by: Myles Watson <[email protected]> Acked-by: Marc Jones <[email protected]> Modified: trunk/coreboot-v2/src/Kconfig =================================================================== --- trunk/coreboot-v2/src/Kconfig 2009-10-12 18:43:26 UTC (rev 4761) +++ trunk/coreboot-v2/src/Kconfig 2009-10-12 22:39:08 UTC (rev 4762) @@ -135,8 +135,8 @@ default n config LB_MEM_TOPK - int - default 2048 + hex + default 0x800 config COMPRESSED_PAYLOAD_LZMA bool Modified: trunk/coreboot-v2/src/cpu/amd/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/amd/Makefile.inc 2009-10-12 18:43:26 UTC (rev 4761) +++ trunk/coreboot-v2/src/cpu/amd/Makefile.inc 2009-10-12 22:39:08 UTC (rev 4762) @@ -1,4 +1,5 @@ subdirs-$(CONFIG_CPU_AMD_SOCKET_F) += socket_F +subdirs-$(CONFIG_CPU_AMD_SOCKET_F_1207) += socket_F_1207 subdirs-$(CONFIG_CPU_AMD_SOCKET_754) += socket_754 subdirs-$(CONFIG_CPU_AMD_SOCKET_939) += socket_939 subdirs-$(CONFIG_CPU_AMD_SOCKET_940) += socket_940 Modified: trunk/coreboot-v2/src/cpu/amd/model_10xxx/Kconfig =================================================================== --- trunk/coreboot-v2/src/cpu/amd/model_10xxx/Kconfig 2009-10-12 18:43:26 UTC (rev 4761) +++ trunk/coreboot-v2/src/cpu/amd/model_10xxx/Kconfig 2009-10-12 22:39:08 UTC (rev 4762) @@ -28,16 +28,16 @@ config DCACHE_RAM_BASE hex - default 0xc8000 + default 0xc4000 depends on CPU_AMD_MODEL_10XXX config DCACHE_RAM_SIZE hex - default 0x08000 + default 0x0c000 depends on CPU_AMD_MODEL_10XXX config DCACHE_RAM_GLOBAL_VAR_SIZE hex - default 0x01000 + default 0x04000 depends on CPU_AMD_MODEL_10XXX Copied: trunk/coreboot-v2/src/cpu/amd/quadcore/Makefile.inc (from rev 4760, trunk/coreboot-v2/src/cpu/amd/dualcore/Makefile.inc) =================================================================== --- trunk/coreboot-v2/src/cpu/amd/quadcore/Makefile.inc (rev 0) +++ trunk/coreboot-v2/src/cpu/amd/quadcore/Makefile.inc 2009-10-12 22:39:08 UTC (rev 4762) @@ -0,0 +1 @@ +obj-y += amd_sibling.o Property changes on: trunk/coreboot-v2/src/cpu/amd/quadcore/Makefile.inc ___________________________________________________________________ Added: svn:mergeinfo + Modified: trunk/coreboot-v2/src/cpu/amd/socket_F_1207/Kconfig =================================================================== --- trunk/coreboot-v2/src/cpu/amd/socket_F_1207/Kconfig 2009-10-12 18:43:26 UTC (rev 4761) +++ trunk/coreboot-v2/src/cpu/amd/socket_F_1207/Kconfig 2009-10-12 22:39:08 UTC (rev 4762) @@ -35,10 +35,20 @@ config CBB hex - default 0xff + default 0x0 depends on CPU_AMD_SOCKET_F_1207 config CDB hex - default 0x0 + default 0x18 depends on CPU_AMD_SOCKET_F_1207 + +config XIP_ROM_BASE + hex + default 0xfff80000 + depends on CPU_AMD_SOCKET_F_1207 + +config XIP_ROM_SIZE + hex + default 0x80000 + depends on CPU_AMD_SOCKET_F_1207 Modified: trunk/coreboot-v2/src/cpu/amd/socket_F_1207/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/amd/socket_F_1207/Makefile.inc 2009-10-12 18:43:26 UTC (rev 4761) +++ trunk/coreboot-v2/src/cpu/amd/socket_F_1207/Makefile.inc 2009-10-12 22:39:08 UTC (rev 4762) @@ -10,5 +10,6 @@ subdirs-y += ../../x86/sse subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache +subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/pae subdirs-y += ../../x86/smm Modified: trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig 2009-10-12 18:43:26 UTC (rev 4761) +++ trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig 2009-10-12 22:39:08 UTC (rev 4762) @@ -13,9 +13,8 @@ select USE_DCACHE_RAM select HAVE_HARD_RESET select IOAPIC - select AP_CODE_IN_CAR select SB_HT_CHAIN_UNITID_OFFSET_ONLY - select WAIT_BEFORE_CPUS_INIT + select SERIAL_CPU_INIT select AMDMCT select HAVE_ACPI_TABLES @@ -24,24 +23,9 @@ default amd/serengeti_cheetah_fam10 depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 -config DCACHE_RAM_BASE - hex - default 0xc8000 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 - -config DCACHE_RAM_SIZE - hex - default 0x08000 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 - -config DCACHE_RAM_GLOBAL_VAR_SIZE - hex - default 0x01000 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 - config APIC_ID_OFFSET hex - default 0x8 + default 0x0 depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 config LB_CKS_RANGE_END @@ -100,11 +84,6 @@ default n depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 -config SERIAL_CPU_INIT - bool - default n - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 - config IRQ_SLOT_COUNT int default 11 @@ -115,3 +94,37 @@ default "mc_patch_01000095.h" depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 +config LB_MEM_TOPK + hex + default 0x4000 + depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 + +config HEAP_SIZE + hex + default 0xc0000 + depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 + +config ACPI_SSDTX_NUM + int + default 31 + depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 + +config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID + hex + default 0x2b80 + depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 + +config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID + hex + default 0x1022 + depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 + +config ENABLE_APIC_EXT_ID + bool + default y + depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 + +config LIFT_BSP_APIC_ID + bool + default y + depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 Modified: trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc 2009-10-12 18:43:26 UTC (rev 4761) +++ trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc 2009-10-12 22:39:08 UTC (rev 4762) @@ -29,12 +29,14 @@ obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o obj-$(CONFIG_HAVE_ACPI_TABLES) += fadt.o -# ./ssdt.o is in northbridge/amd/amdk8/Config.lb -obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt2.o -obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt3.o -obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt4.o -driver-y += ../../../drivers/i2c/i2cmux/i2cmux.o +# ./ssdt.o is in northbridge/amd/amdfam10/Makefile.inc +obj-$(CONFIG_HAVE_ACPI_TABLES) += ssdt2.o +obj-$(CONFIG_HAVE_ACPI_TABLES) += ssdt3.o +obj-$(CONFIG_HAVE_ACPI_TABLES) += ssdt4.o +obj-$(CONFIG_HAVE_ACPI_TABLES) += ssdt5.o +driver-y += ../../../drivers/i2c/i2cmux2/i2cmux2.o + # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o @@ -54,32 +56,38 @@ ifdef POST_EVALUATION -$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/dsdt_lb.dsl - iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dx/dsdt_lb.dsl - mv dsdt.hex $@ +$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/dsdt_lb.dsl + iasl -p $(obj)/mainboard/$(MAINBOARDDIR)/dsdt -tc $< + mv $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.hex $@ -$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c +$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@ -$(obj)/ssdt2.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci2.asl - iasl -p $(CURDIR)/pci2 -tc $(CONFIG_MAINBOARD)/dx/pci2.asl - perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex - mv pci2.hex ssdt2.c +$(obj)/mainboard/$(MAINBOARDDIR)/ssdt2.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci2.asl + iasl -p $(obj)/mainboard/$(MAINBOARDDIR)/pci2 -tc $< + perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' $(obj)/mainboard/$(MAINBOARDDIR)/pci2.hex + mv $(obj)/mainboard/$(MAINBOARDDIR)/pci2.hex $@ -$(obj)/ssdt3.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci3.asl" - iasl -p $(CURDIR)/pci3 -tc $(CONFIG_MAINBOARD)/ - perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex - mv pci3.hex ssdt3.c +$(obj)/mainboard/$(MAINBOARDDIR)/ssdt3.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci3.asl + iasl -p $(obj)/mainboard/$(MAINBOARDDIR)/pci3 -tc $< + perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' $(obj)/mainboard/$(MAINBOARDDIR)/pci3.hex + mv $(obj)/mainboard/$(MAINBOARDDIR)/pci3.hex $@ -$(obj)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl" - iasl -p $(CURDIR)/pci4 -tc $(CONFIG_MAINBOARD)/dx/pci4.asl - perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex - mv pci4.hex ssdt4.c +$(obj)/mainboard/$(MAINBOARDDIR)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl + iasl -p $(obj)/mainboard/$(MAINBOARDDIR)/pci4 -tc $< + perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' $(obj)/mainboard/$(MAINBOARDDIR)/pci4.hex + mv $(obj)/mainboard/$(MAINBOARDDIR)/pci4.hex $@ +$(obj)/mainboard/$(MAINBOARDDIR)/ssdt5.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci5.asl + iasl -p $(obj)/mainboard/$(MAINBOARDDIR)/pci5 -tc $< + perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' $(obj)/mainboard/$(MAINBOARDDIR)/pci5.hex + mv $(obj)/mainboard/$(MAINBOARDDIR)/pci5.hex $@ + $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@ perl -e 's/\.rodata/.rom.data/g' -pi $@ perl -e 's/\.text/.section .rom.text/g' -pi $@ + endif Modified: trunk/coreboot-v2/src/northbridge/amd/amdfam10/Kconfig =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdfam10/Kconfig 2009-10-12 18:43:26 UTC (rev 4761) +++ trunk/coreboot-v2/src/northbridge/amd/amdfam10/Kconfig 2009-10-12 22:39:08 UTC (rev 4762) @@ -26,4 +26,14 @@ default 0x4000000 depends on NORTHBRIDGE_AMD_AMDFAM10 +config HYPERTRANSPORT_PLUGIN_SUPPORT + bool + default y + depends on NORTHBRIDGE_AMD_AMDFAM10 + +config HT3_SUPPORT + bool + default y + depends on NORTHBRIDGE_AMD_AMDFAM10 + source src/northbridge/amd/amdfam10/root_complex/Kconfig Modified: trunk/coreboot-v2/src/northbridge/amd/amdfam10/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdfam10/Makefile.inc 2009-10-12 18:43:26 UTC (rev 4761) +++ trunk/coreboot-v2/src/northbridge/amd/amdfam10/Makefile.inc 2009-10-12 22:39:08 UTC (rev 4762) @@ -10,3 +10,36 @@ obj-$(CONFIG_HAVE_ACPI_TABLES) += sspr5.o obj-y += get_pci1234.o + +ifdef POST_EVALUATION +$(obj)/northbridge/amd/amdfam10/ssdt.c: $(src)/northbridge/amd/amdfam10/ssdt.dsl + iasl -p $(CURDIR)/ssdt -tc $< + perl -pi -e 's/AmlCode/AmlCode_ssdt/g' ssdt.hex + mv ssdt.hex $@ + +$(obj)/northbridge/amd/amdfam10/sspr1.c: $(src)/northbridge/amd/amdfam10/sspr1.dsl + iasl -p $(CURDIR)/sspr1 -tc $< + perl -pi -e 's/AmlCode/AmlCode_sspr1/g' sspr1.hex + mv sspr1.hex $@ + +$(obj)/northbridge/amd/amdfam10/sspr2.c: $(src)/northbridge/amd/amdfam10/sspr2.dsl + iasl -p $(CURDIR)/sspr2 -tc $< + perl -pi -e 's/AmlCode/AmlCode_sspr2/g' sspr2.hex + mv sspr2.hex $@ + +$(obj)/northbridge/amd/amdfam10/sspr3.c: $(src)/northbridge/amd/amdfam10/sspr3.dsl + iasl -p $(CURDIR)/sspr3 -tc $< + perl -pi -e 's/AmlCode/AmlCode_sspr3/g' sspr3.hex + mv sspr3.hex $@ + +$(obj)/northbridge/amd/amdfam10/sspr4.c: $(src)/northbridge/amd/amdfam10/sspr4.dsl + iasl -p $(CURDIR)/sspr4 -tc $< + perl -pi -e 's/AmlCode/AmlCode_sspr4/g' sspr4.hex + mv sspr4.hex $@ + +$(obj)/northbridge/amd/amdfam10/sspr5.c: $(src)/northbridge/amd/amdfam10/sspr5.dsl + iasl -p $(CURDIR)/sspr5 -tc $< + perl -pi -e 's/AmlCode/AmlCode_sspr5/g' sspr5.hex + mv sspr5.hex $@ +endif + -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
