Author: zbao Date: 2009-10-14 04:56:00 +0200 (Wed, 14 Oct 2009) New Revision: 4772
Modified: trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_hda.c trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sata.c Log: delete white trailing spaces. It is done by the perl command. sh> perl -pi -e 's/[[:blank:]]+$//' $files Trivial. Signed-off-by: Zheng Bao <[email protected]> Acked-by: Zheng Bao <[email protected]> Modified: trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_hda.c =================================================================== --- trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_hda.c 2009-10-14 02:38:24 UTC (rev 4771) +++ trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_hda.c 2009-10-14 02:56:00 UTC (rev 4772) @@ -42,8 +42,8 @@ dword |= val; writel(dword, port); - /* Wait for readback of register to - * match what was just written to it + /* Wait for readback of register to + * match what was just written to it */ count = 50; do { @@ -64,11 +64,11 @@ u32 dword; /* Set Bit0 to 0 to enter reset state (BAR + 0x8)[0] */ - if (set_bits(base + 0x08, 1, 0) == -1) + if (set_bits(base + 0x08, 1, 0) == -1) goto no_codec; /* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + 0x08, 1, 1) == -1) + if (set_bits(base + 0x08, 1, 1) == -1) goto no_codec; /* Delay for 1 ms since the BKDG does */ @@ -79,7 +79,7 @@ dword &= 0x0F; if (!dword) goto no_codec; - + return dword; no_codec: @@ -271,10 +271,10 @@ struct resource *res; u32 codec_mask; device_t sm_dev; - + /* Enable azalia - PM_io 0x59[4], disable ac97 - PM_io 0x59[1..0] */ pm_iowrite(0x59, 0xB); - + /* Find the SMBus */ /* FIXME: Need to find out why the call below crashes. */ /*sm_dev = dev_find_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_ATI_SB600_SM, 0);*/ @@ -294,8 +294,8 @@ pci_write_config32(dev, 0x2c, dword); /* Read in BAR */ - /* Is this right? HDA allows for a 64-bit BAR - * but this is only setup for a 32-bit one + /* Is this right? HDA allows for a 64-bit BAR + * but this is only setup for a 32-bit one */ res = find_resource(dev, 0x10); if (!res) Modified: trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sata.c =================================================================== --- trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sata.c 2009-10-14 02:38:24 UTC (rev 4771) +++ trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sata.c 2009-10-14 02:56:00 UTC (rev 4772) @@ -185,14 +185,14 @@ byte = readb(sata_bar5 + 0x12C + 0x80 * i); /* Set Reset Bit and 1.5g bit */ - byte |= 0x11; + byte |= 0x11; writeb(byte, (sata_bar5 + 0x12C + 0x80 * i)); - - /* Wait 1ms */ - mdelay(1); + /* Wait 1ms */ + mdelay(1); + /* Clear Reset Bit */ - byte &= ~0x01; + byte &= ~0x01; writeb(byte, (sata_bar5 + 0x12C + 0x80 * i)); /* Wait 1ms */ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
